Searched +full:zynqmp +full:- +full:dpsub +full:- +full:1 (Results 1 – 5 of 5) sorted by relevance
/Linux-v6.1/drivers/gpu/drm/xlnx/ |
D | zynqmp_dpsub.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * ZynqMP DisplayPort Subsystem Driver 5 * Copyright (C) 2017 - 2020 Xilinx, Inc. 8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com> 9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 13 #include <linux/dma-mapping.h> 36 /* ----------------------------------------------------------------------------- 44 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm); in zynqmp_dpsub_dumb_create() local 45 unsigned int pitch = DIV_ROUND_UP(args->width * args->bpp, 8); in zynqmp_dpsub_dumb_create() 48 args->pitch = ALIGN(pitch, dpsub->dma_align); in zynqmp_dpsub_dumb_create() [all …]
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D | zynqmp_disp.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * ZynqMP Display Controller Driver 5 * Copyright (C) 2017 - 2020 Xilinx, Inc. 8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com> 9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 28 #include <linux/dma-mapping.h> 43 * -------- 45 * The display controller part of ZynqMP DP subsystem, made of the Audio/Video 48 * +------------------------------------------------------------+ 49 * +--------+ | +----------------+ +-----------+ | [all …]
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D | zynqmp_dp.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * ZynqMP DisplayPort Driver 5 * Copyright (C) 2017 - 2020 Xilinx, Inc. 8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com> 9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 59 #define ZYNQMP_DP_SOFTWARE_RESET_STREAM2 BIT(1) 93 #define ZYNQMP_DP_CORE_ID_DIRECTION GENMASK(1) 106 #define ZYNQMP_DP_INTERRUPT_SIGNAL_STATE_REQUEST BIT(1) 113 #define ZYNQMP_DP_AUX_REPLY_CODE_AUX_DEFER BIT(1) 125 #define ZYNQMP_DP_INT_HPD_EVENT BIT(1) [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/display/xlnx/ |
D | xlnx,zynqmp-dpsub.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Xilinx ZynqMP DisplayPort Subsystem 10 The DisplayPort subsystem of Xilinx ZynqMP (Zynq UltraScale+ MPSoC) 14 +------------------------------------------------------------+ 15 +--------+ | +----------------+ +-----------+ | 16 | DPDMA | --->| | --> | Video | Video +-------------+ | 17 | 4x vid | | | | | Rendering | -+--> | | | +------+ [all …]
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/Linux-v6.1/arch/arm64/boot/dts/xilinx/ |
D | zynqmp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP 5 * (C) Copyright 2014 - 2021, Xilinx, Inc. 15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h> 16 #include <dt-bindings/power/xlnx-zynqmp-power.h> 17 #include <dt-bindings/reset/xlnx-zynqmp-resets.h> 20 compatible = "xlnx,zynqmp"; 21 #address-cells = <2>; 22 #size-cells = <2>; 25 #address-cells = <1>; [all …]
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