| /Linux-v6.6/drivers/media/i2c/ |
| D | ov2685.c | 90 struct clk *xvclk; member
110 /* PLL settings bases on 24M xvclk */
458 ret = clk_prepare_enable(ov2685->xvclk); in __ov2685_power_on()
460 dev_err(dev, "Failed to enable xvclk\n"); in __ov2685_power_on()
474 /* 8192 xvclk cycles prior to the first SCCB transaction */ in __ov2685_power_on()
492 clk_disable_unprepare(ov2685->xvclk); in __ov2685_power_on()
499 /* 512 xvclk cycles after the last SCCB transaction or MIPI frame end */ in __ov2685_power_off()
503 clk_disable_unprepare(ov2685->xvclk); in __ov2685_power_off()
797 ov2685->xvclk = devm_clk_get(dev, "xvclk"); in ov2685_probe()
798 if (IS_ERR(ov2685->xvclk)) { in ov2685_probe()
[all …]
|
| D | ov2680.c | 156 struct clk *xvclk; member
515 clk_disable_unprepare(sensor->xvclk); in ov2680_power_off()
544 ret = clk_prepare_enable(sensor->xvclk); in ov2680_power_on()
1053 sensor->xvclk = devm_clk_get_optional(dev, "xvclk"); in ov2680_parse_dt()
1054 if (IS_ERR(sensor->xvclk)) { in ov2680_parse_dt()
1055 ret = dev_err_probe(dev, PTR_ERR(sensor->xvclk), in ov2680_parse_dt()
1056 "xvclk clock missing or invalid\n"); in ov2680_parse_dt()
1071 if (ret && !sensor->xvclk) { in ov2680_parse_dt()
1076 if (!ret && sensor->xvclk) { in ov2680_parse_dt()
1077 ret = clk_set_rate(sensor->xvclk, rate); in ov2680_parse_dt()
[all …]
|
| D | ov5675.c | 499 struct clk *xvclk; member
982 /* 512 xvclk cycles after the last SCCB transation or MIPI frame end */ in ov5675_power_off()
989 clk_disable_unprepare(ov5675->xvclk); in ov5675_power_off()
1003 ret = clk_prepare_enable(ov5675->xvclk); in ov5675_power_on()
1005 dev_err(dev, "failed to enable xvclk: %d\n", ret); in ov5675_power_on()
1013 clk_disable_unprepare(ov5675->xvclk); in ov5675_power_on()
1024 /* 8192 xvclk cycles prior to the first SCCB transation */ in ov5675_power_on()
1232 ov5675->xvclk = devm_clk_get_optional(dev, NULL); in ov5675_get_hwcfg()
1233 if (IS_ERR(ov5675->xvclk)) in ov5675_get_hwcfg()
1234 return dev_err_probe(dev, PTR_ERR(ov5675->xvclk), in ov5675_get_hwcfg()
[all …]
|
| D | ov5695.c | 97 struct clk *xvclk; member
978 ret = clk_prepare_enable(ov5695->xvclk); in __ov5695_power_on()
980 dev_err(dev, "Failed to enable xvclk\n"); in __ov5695_power_on()
1008 clk_disable_unprepare(ov5695->xvclk); in __ov5695_power_on()
1018 clk_disable_unprepare(ov5695->xvclk); in __ov5695_power_off()
1284 ov5695->xvclk = devm_clk_get(dev, "xvclk"); in ov5695_probe()
1285 if (IS_ERR(ov5695->xvclk)) { in ov5695_probe()
1286 dev_err(dev, "Failed to get xvclk\n"); in ov5695_probe()
1289 ret = clk_set_rate(ov5695->xvclk, OV5695_XVCLK_FREQ); in ov5695_probe()
1291 dev_err(dev, "Failed to set xvclk rate (24MHz)\n"); in ov5695_probe()
[all …]
|
| D | ov4689.c | 92 struct clk *xvclk; member
529 ret = clk_prepare_enable(ov4689->xvclk); in ov4689_power_on()
531 dev_err(dev, "Failed to enable xvclk\n"); in ov4689_power_on()
555 clk_disable_unprepare(ov4689->xvclk); in ov4689_power_on()
566 clk_disable_unprepare(ov4689->xvclk); in ov4689_power_off()
894 ov4689->xvclk = devm_clk_get_optional(dev, NULL); in ov4689_probe()
895 if (IS_ERR(ov4689->xvclk)) in ov4689_probe()
896 return dev_err_probe(dev, PTR_ERR(ov4689->xvclk), in ov4689_probe()
899 if (!ov4689->xvclk) { in ov4689_probe()
905 ov4689->clock_rate = clk_get_rate(ov4689->xvclk); in ov4689_probe()
|
| D | ov5693.c | 146 struct clk *xvclk; member
667 clk_disable_unprepare(ov5693->xvclk); in ov5693_sensor_powerdown()
677 ret = clk_prepare_enable(ov5693->xvclk); in ov5693_sensor_powerup()
1292 ov5693->xvclk = devm_clk_get_optional(&client->dev, "xvclk"); in ov5693_probe()
1293 if (IS_ERR(ov5693->xvclk)) in ov5693_probe()
1294 return dev_err_probe(&client->dev, PTR_ERR(ov5693->xvclk), in ov5693_probe()
1295 "failed to get xvclk: %ld\n", in ov5693_probe()
1296 PTR_ERR(ov5693->xvclk)); in ov5693_probe()
1298 if (ov5693->xvclk) { in ov5693_probe()
1299 xvclk_rate = clk_get_rate(ov5693->xvclk); in ov5693_probe()
|
| D | ov5648.c | 513 * +-< XVCLK
554 * +-< XVCLK
652 struct clk *xvclk; member
667 * XVCLK = 24 MHz
681 * XVCLK = 24 MHz
695 * XVCLK = 24 MHz
1226 xvclk_rate = clk_get_rate(sensor->xvclk); in ov5648_mode_pll1_rate()
1872 * - XVCLK must be provided 1 ms before register access; in ov5648_sensor_power()
1907 ret = clk_prepare_enable(sensor->xvclk); in ov5648_sensor_power()
1909 dev_err(sensor->dev, "failed to enable XVCLK clock\n"); in ov5648_sensor_power()
[all …]
|
| D | ov7740.c | 93 struct clk *xvclk; member
302 ret = clk_prepare_enable(ov7740->xvclk); in ov7740_set_power()
316 clk_disable_unprepare(ov7740->xvclk); in ov7740_set_power()
1074 ov7740->xvclk = devm_clk_get(&client->dev, "xvclk"); in ov7740_probe()
1075 if (IS_ERR(ov7740->xvclk)) { in ov7740_probe()
1076 ret = PTR_ERR(ov7740->xvclk); in ov7740_probe()
1078 "OV7740: fail to get xvclk: %d\n", ret); in ov7740_probe()
|
| D | ov8856.c | 1421 struct clk *xvclk; member
2082 ret = clk_prepare_enable(ov8856->xvclk); in ov8856_power_on()
2084 dev_err(dev, "failed to enable xvclk\n"); in ov8856_power_on()
2107 clk_disable_unprepare(ov8856->xvclk); in ov8856_power_on()
2123 clk_disable_unprepare(ov8856->xvclk); in ov8856_power_off()
2324 ov8856->xvclk = devm_clk_get(dev, "xvclk"); in ov8856_get_hwcfg()
2325 if (IS_ERR(ov8856->xvclk)) { in ov8856_get_hwcfg()
2326 dev_err(dev, "could not get xvclk clock (%pe)\n", in ov8856_get_hwcfg()
2327 ov8856->xvclk); in ov8856_get_hwcfg()
2328 return PTR_ERR(ov8856->xvclk); in ov8856_get_hwcfg()
[all …]
|
| D | ov8858.c | 107 struct clk *xvclk; member
1624 if (clk_get_rate(ov8858->xvclk) != OV8858_XVCLK_FREQ) in ov8858_power_on()
1625 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n"); in ov8858_power_on()
1627 ret = clk_prepare_enable(ov8858->xvclk); in ov8858_power_on()
1629 dev_err(dev, "Failed to enable xvclk\n"); in ov8858_power_on()
1655 clk_disable_unprepare(ov8858->xvclk); in ov8858_power_on()
1663 clk_disable_unprepare(ov8858->xvclk); in ov8858_power_off()
1884 ov8858->xvclk = devm_clk_get(dev, "xvclk"); in ov8858_probe()
1885 if (IS_ERR(ov8858->xvclk)) in ov8858_probe()
1886 return dev_err_probe(dev, PTR_ERR(ov8858->xvclk), in ov8858_probe()
[all …]
|
| /Linux-v6.6/Documentation/devicetree/bindings/media/i2c/ |
| D | ov2640.txt | 9 - clocks: reference to the xvclk input clock.
10 - clock-names: should be "xvclk".
31 clock-names = "xvclk";
|
| D | ov2659.txt | 11 - clocks: reference to the xvclk input clock.
12 - clock-names: should be "xvclk".
34 clock-names = "xvclk";
|
| D | ov7740.txt | 14 - clocks: Reference to the xvclk input clock.
15 - clock-names: "xvclk".
35 clock-names = "xvclk";
|
| D | ovti,ov2685.yaml | 21 - description: XVCLK clock
25 - const: xvclk
86 clock-names = "xvclk";
|
| D | ovti,ov8858.yaml | 27 description: XVCLK external clock
30 const: xvclk
89 clock-names = "xvclk";
|
| D | ov8856.yaml | 35 - const: xvclk
39 Frequency of the xvclk clock in Hertz.
118 clock-names = "xvclk";
|
| D | ovti,ov2680.yaml | 31 const: xvclk
82 clock-names = "xvclk";
|
| D | ovti,ov5693.yaml | 49 System input clock (aka XVCLK). From 6 to 27 MHz.
53 const: xvclk
|
| D | ov9650.txt | 7 - clocks: reference to the xvclk input clock.
|
| D | ovti,ov5648.yaml | 21 - description: XVCLK Clock
|
| D | ovti,ov5675.yaml | 34 System input clock (aka XVCLK). From 6 to 27 MHz.
|
| D | ovti,ov4689.yaml | 31 External clock (XVCLK) for the sensor, 6-64 MHz
|
| /Linux-v6.6/arch/arm/boot/dts/microchip/ |
| D | at91sam9g25ek.dts | 26 clock-names = "xvclk";
|
| /Linux-v6.6/arch/arm64/boot/dts/qcom/ |
| D | sdm845-db845c-navigation-mezzanine.dts | 41 clock-names = "xvclk";
|
| /Linux-v6.6/Documentation/devicetree/bindings/media/ |
| D | atmel-isi.txt | 55 clock-names = "xvclk";
|
