/Linux-v6.6/sound/hda/ |
D | hdac_controller.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * HD-audio controller helpers 19 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp() 25 dev_err(bus->dev, "CORB reset timeout#1, CORBRP = %d\n", in azx_clear_corbrp() 29 for (timeout = 1000; timeout > 0; timeout--) { in azx_clear_corbrp() 35 dev_err(bus->dev, "CORB reset timeout#2, CORBRP = %d\n", in azx_clear_corbrp() 40 * snd_hdac_bus_init_cmd_io - set up CORB/RIRB buffers 41 * @bus: HD-audio core bus 45 WARN_ON_ONCE(!bus->rb.area); in snd_hdac_bus_init_cmd_io() 47 spin_lock_irq(&bus->reg_lock); in snd_hdac_bus_init_cmd_io() [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/mmc/ |
D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MMC Controller Common Properties 10 - Ulf Hansson <ulf.hansson@linaro.org> 17 It is possible to assign a fixed index mmcN to an MMC host controller 25 "#address-cells": 30 "#size-cells": 37 broken-cd: [all …]
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D | fsl-esdhc.txt | 1 * Freescale Enhanced Secure Digital Host Controller (eSDHC) 3 The Enhanced Secure Digital Host Controller provides an interface 7 by mmc.txt and the properties used by the sdhci-esdhc driver. 10 - compatible : should be "fsl,esdhc", or "fsl,<chip>-esdhc". 12 "fsl,mpc8536-esdhc" 13 "fsl,mpc8378-esdhc" 14 "fsl,p2020-esdhc" 15 "fsl,p4080-esdhc" 16 "fsl,t1040-esdhc" 17 "fsl,t4240-esdhc" [all …]
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D | fsl-imx-esdhc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX 10 - Shawn Guo <shawnguo@kernel.org> 13 - $ref: sdhci-common.yaml# 16 The Enhanced Secure Digital Host Controller on Freescale i.MX family 20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver. 25 - enum: [all …]
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D | k3-dw-mshc.txt | 2 Storage Host Controller 4 Read synopsys-dw-mshc.txt for more details 6 The Synopsys designware mobile storage host controller is used to interface 8 differences between the core Synopsys dw mshc controller properties described 9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific 10 extensions to the Synopsys Designware Mobile Storage Host Controller. 15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions. 16 - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers 18 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions. 19 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions. [all …]
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D | sunplus,mmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Sunplus MMC Controller 11 - Tony Huang <tonyhuang.sunplus@gmail.com> 12 - Li-hao Kuo <lhjeff911@gmail.com> 15 - $ref: mmc-controller.yaml 20 - sunplus,sp7021-mmc 35 - compatible 36 - reg [all …]
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D | atmel-hsmci.txt | 3 This controller on atmel products provides an interface for MMC, SD and SDIO 7 by mmc.txt and the properties used by the atmel-mci driver. 12 - compatible: should be "atmel,hsmci" 13 - #address-cells: should be one. The cell is the slot id. 14 - #size-cells: should be zero. 15 - at least one slot node 16 - clock-names: tuple listing input clock names. 18 - clocks: phandles to input clocks. 28 #address-cells = <1>; 29 #size-cells = <0>; [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/mtd/ |
D | nvidia-tegra20-nand.txt | 1 NVIDIA Tegra NAND Flash controller 4 - compatible: Must be one of: 5 - "nvidia,tegra20-nand" 6 - reg: MMIO address range 7 - interrupts: interrupt output of the NFC controller 8 - clocks: Must contain an entry for each entry in clock-names. 9 See ../clocks/clock-bindings.txt for details. 10 - clock-names: Must include the following entries: 11 - nand 12 - resets: Must contain an entry for each entry in reset-names. [all …]
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D | brcm,brcmnand.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom STB NAND Controller 10 - Brian Norris <computersforpeace@gmail.com> 11 - Kamal Dasu <kdasu.kdev@gmail.com> 14 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND 15 flash chips. It has a memory-mapped register interface for both control 16 registers and for its data input/output buffer. On some SoCs, this controller 20 This controller was originally designed for STB SoCs (BCM7xxx) but is now [all …]
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D | ingenic,nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Ingenic SoCs NAND controller 10 - Paul Cercueil <paul@crapouillou.net> 13 - $ref: nand-controller.yaml# 14 - $ref: /schemas/memory-controllers/ingenic,nemc-peripherals.yaml# 19 - ingenic,jz4740-nand 20 - ingenic,jz4725b-nand 21 - ingenic,jz4780-nand [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/pinctrl/ |
D | marvell,dove-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding 7 - compatible: "marvell,dove-pinctrl" 8 - clocks: (optional) phandle of pdma clock 9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers 19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu* 23 uart1(cts), lcd-spi(cs1), pmu* 25 mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu* 31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl), 35 mpp13 13 gpio, pmu, uart2(cts), audio1(extclk), sdio1(wp), 39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1) [all …]
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/Linux-v6.6/arch/arm/boot/dts/nxp/imx/ |
D | imx6qdl-rex.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 13 stdout-path = &uart1; 16 reg_3p3v: regulator-3p3v { 17 compatible = "regulator-fixed"; 18 regulator-name = "3P3V"; 19 regulator-min-microvolt = <3300000>; 20 regulator-max-microvolt = <3300000>; 21 regulator-always-on; [all …]
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D | imx50-kobo-aura.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 4 // The Kobo Aura e-book reader, model N514. The mainboard is marked as E606F0B. 6 /dts-v1/; 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 16 stdout-path = "serial1:115200n8"; 24 gpio-leds { 25 compatible = "gpio-leds"; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_leds>; [all …]
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D | mba6ulx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2018-2022 TQ-Systems GmbH 4 * Author: Markus Niebel <Markus.Niebel@tq-group.com> 8 model = "TQ-Systems MBA6ULx Baseboard"; 18 stdout-path = &uart1; 22 compatible = "pwm-backlight"; 23 power-supply = <®_mba6ul_3v3>; 24 enable-gpios = <&expander_out0 4 GPIO_ACTIVE_HIGH>; 29 compatible = "gpio-beeper"; 33 gpio_buttons: gpio-keys { [all …]
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D | imx6sx-sabreauto.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 /dts-v1/; 11 compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx"; 19 compatible = "gpio-leds"; 20 pinctrl-names = "default"; 21 pinctrl-0 = <&pinctrl_led>; 23 led-user { 26 linux,default-trigger = "heartbeat"; 30 vcc_sd3: regulator-vcc-sd3 { 31 compatible = "regulator-fixed"; [all …]
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D | imx6sx-sdb.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 13 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx"; 16 stdout-path = &uart1; 24 backlight_display: backlight-display { 25 compatible = "pwm-backlight"; 27 brightness-levels = <0 4 8 16 32 64 128 255>; 28 default-brightness-level = <6>; [all …]
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/Linux-v6.6/sound/pci/lola/ |
D | lola.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Support for Digigram Lola PCI-e boards 11 #include <linux/dma-mapping.h> 34 /* Lola-specific options */ 40 [0 ... (SNDRV_CARDS - 1)] = LOLA_GRANULARITY_MAX 45 [0 ... (SNDRV_CARDS - 1) ] = 16000 70 * pseudo-codec read/write via CORB/RIRB 78 int ret = -EIO; in corb_send_verb() 80 chip->last_cmd_nid = nid; in corb_send_verb() 81 chip->last_verb = verb; in corb_send_verb() [all …]
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/Linux-v6.6/arch/arm/boot/dts/marvell/ |
D | kirkwood-pogoplug-series-4.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4 10 /dts-v1/; 13 #include "kirkwood-6192.dtsi" 14 #include <dt-bindings/input/linux-event-codes.h> 18 compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192", 27 stdout-path = "uart0:115200n8"; 31 compatible = "gpio-keys"; 32 #address-cells = <1>; 33 #size-cells = <0>; [all …]
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/Linux-v6.6/drivers/bus/mhi/host/ |
D | init.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. 10 #include <linux/dma-direction.h> 11 #include <linux/dma-mapping.h> 59 [MHI_PM_STATE_M3_ENTER] = "M?->M3", 61 [MHI_PM_STATE_M3_EXIT] = "M3->M0", 87 struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; in serial_number_show() 90 mhi_cntrl->serial_number); in serial_number_show() 99 struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; in oem_pk_hash_show() 102 for (i = 0; i < ARRAY_SIZE(mhi_cntrl->oem_pk_hash); i++) in oem_pk_hash_show() [all …]
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D | debugfs.c | 1 // SPDX-License-Identifier: GPL-2.0 17 struct mhi_controller *mhi_cntrl = m->private; in mhi_debugfs_states_show() 21 to_mhi_pm_state_str(mhi_cntrl->pm_state), in mhi_debugfs_states_show() 23 mhi_state_str(mhi_cntrl->dev_state), in mhi_debugfs_states_show() 24 TO_MHI_EXEC_STR(mhi_cntrl->ee), in mhi_debugfs_states_show() 25 mhi_cntrl->wake_set ? "true" : "false"); in mhi_debugfs_states_show() 28 seq_printf(m, "M0: %u M2: %u M3: %u", mhi_cntrl->M0, mhi_cntrl->M2, in mhi_debugfs_states_show() 29 mhi_cntrl->M3); in mhi_debugfs_states_show() 32 atomic_read(&mhi_cntrl->dev_wake), in mhi_debugfs_states_show() 33 atomic_read(&mhi_cntrl->pending_pkts)); in mhi_debugfs_states_show() [all …]
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D | pm.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. 9 #include <linux/dma-direction.h> 10 #include <linux/dma-mapping.h> 31 * L0: DISABLE <--> POR 32 * POR <--> POR 33 * POR -> M0 -> M2 --> M0 34 * POR -> FW_DL_ERR 35 * FW_DL_ERR <--> FW_DL_ERR 36 * M0 <--> M0 [all …]
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/Linux-v6.6/arch/riscv/boot/dts/allwinner/ |
D | sun20i-d1-nezha.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ or MIT) 2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org> 7 * The Nezha-D1 has a 40-pin IO header. Some of these pins are routed 8 * directly to pads on the SoC, others come from an 8-bit pcf857x IO 10 * one set for the pcf857x, and one set for the pio controller. 12 * Lines which are routed to the 40-pin header are named as follows: 15 * <pin#> is the actual pin number of the 40-pin header 20 * http://dl.linux-sunxi.org/D1/D1_Nezha_development_board_schematic_diagram_20210224.pdf 23 #include <dt-bindings/gpio/gpio.h> 24 #include <dt-bindings/input/input.h> [all …]
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/Linux-v6.6/arch/powerpc/boot/dts/ |
D | ac14xx.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 14 #address-cells = <1>; 15 #size-cells = <1>; 26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */ 27 bus-frequency = <160000000>; /* 160 MHz csb bus */ 28 clock-frequency = <400000000>; /* 400 MHz ppc core */ 49 compatible = "cfi-flash"; 51 #address-cells = <1>; 52 #size-cells = <1>; 53 bank-width = <2>; [all …]
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/Linux-v6.6/arch/arm64/boot/dts/amlogic/ |
D | meson-khadas-vim3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/gpio/meson-g12a-gpio.h> 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 22 stdout-path = "serial0:115200n8"; 30 adc-keys { 31 compatible = "adc-keys"; 32 io-channels = <&saradc 2>; 33 io-channel-names = "buttons"; [all …]
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/Linux-v6.6/drivers/nvme/host/ |
D | zns.c | 1 // SPDX-License-Identifier: GPL-2.0 12 struct request_queue *q = ns->queue; in nvme_revalidate_zones() 14 blk_queue_chunk_sectors(q, ns->zsze); in nvme_revalidate_zones() 15 blk_queue_max_zone_append_sectors(q, ns->ctrl->max_zone_append); in nvme_revalidate_zones() 17 return blk_revalidate_disk_zones(ns->disk, NULL); in nvme_revalidate_zones() 28 return -ENOMEM; in nvme_set_max_append() 34 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); in nvme_set_max_append() 40 if (id->zasl) in nvme_set_max_append() 41 ctrl->max_zone_append = 1 << (id->zasl + 3); in nvme_set_max_append() 43 ctrl->max_zone_append = ctrl->max_hw_sectors; in nvme_set_max_append() [all …]
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