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/Linux-v6.1/arch/mips/mm/
Dc-octeon.c179 c->icache.ways = 1 + ((config1 >> 16) & 7); in probe_octeon()
182 c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon()
183 c->icache.waybit = ffs(icache_size / c->icache.ways) - 1; in probe_octeon()
189 c->dcache.ways = 64; in probe_octeon()
191 c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon()
192 c->dcache.waybit = ffs(dcache_size / c->dcache.ways) - 1; in probe_octeon()
199 c->icache.ways = 37; in probe_octeon()
201 icache_size = c->icache.sets * c->icache.ways * c->icache.linesz; in probe_octeon()
204 c->dcache.ways = 32; in probe_octeon()
206 dcache_size = c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon()
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Dc-r4k.c265 unsigned long ws_end = current_cpu_data.icache.ways << in tx49_blast_icache32()
298 unsigned long ws_end = current_cpu_data.icache.ways << in tx49_blast_icache32_page_indexed()
1120 c->icache.ways = 2; in probe_pcache()
1125 c->dcache.ways = 2; in probe_pcache()
1134 c->icache.ways = 2; in probe_pcache()
1139 c->dcache.ways = 2; in probe_pcache()
1148 c->icache.ways = 4; in probe_pcache()
1153 c->dcache.ways = 4; in probe_pcache()
1169 c->icache.ways = 1; in probe_pcache()
1174 c->dcache.ways = 1; in probe_pcache()
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Dsc-mips.c170 c->scache.ways = assoc + 1; in mips_sc_probe_cm3()
220 c->scache.ways = tmp + 1; in mips_sc_probe()
227 * According to config2 it would be 5-ways, but that is in mips_sc_probe()
232 c->scache.ways = 4; in mips_sc_probe()
236 * According to config2 it would be 5-ways and 512-sets, in mips_sc_probe()
242 c->scache.ways = 4; in mips_sc_probe()
Dsc-rm7k.c238 c->scache.ways = 4; in rm7k_sc_init()
239 c->scache.waybit= __ffs(scache_size / c->scache.ways); in rm7k_sc_init()
240 c->scache.waysize = scache_size / c->scache.ways; in rm7k_sc_init()
241 c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways); in rm7k_sc_init()
268 c->tcache.ways = 1; in rm7k_sc_init()
/Linux-v6.1/arch/sh/kernel/cpu/sh4/
Dprobe.c38 boot_cpu_data.icache.ways = 1; in cpu_probe()
47 boot_cpu_data.dcache.ways = 1; in cpu_probe()
67 boot_cpu_data.icache.ways = 4; in cpu_probe()
68 boot_cpu_data.dcache.ways = 4; in cpu_probe()
171 boot_cpu_data.icache.ways = 2; in cpu_probe()
172 boot_cpu_data.dcache.ways = 2; in cpu_probe()
176 boot_cpu_data.icache.ways = 2; in cpu_probe()
177 boot_cpu_data.dcache.ways = 2; in cpu_probe()
192 boot_cpu_data.icache.ways = 2; in cpu_probe()
193 boot_cpu_data.dcache.ways = 2; in cpu_probe()
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/Linux-v6.1/tools/perf/pmu-events/arch/arm64/arm/cortex-a73/
Dcache.json54 "PublicDescription": "Number of ways read in the instruction cache - Tag RAM",
57 "BriefDescription": "Number of ways read in the instruction cache - Tag RAM"
60 "PublicDescription": "Number of ways read in the instruction cache - Data RAM",
63 "BriefDescription": "Number of ways read in the instruction cache - Data RAM"
66 "PublicDescription": "Number of ways read in the instruction BTAC RAM",
69 "BriefDescription": "Number of ways read in the instruction BTAC RAM"
/Linux-v6.1/arch/arm/boot/dts/
Dbcm2837.dtsi58 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
61 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
73 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
76 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
88 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
91 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
103 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
106 i-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
120 cache-sets = <512>; // 512KiB(size)/64(line-size)=8192ways/16-way set
Dbcm2836.dtsi59 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
62 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
73 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
76 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
87 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
90 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
101 d-cache-sets = <128>; // 32KiB(size)/64(line-size)=512ways/4-way set
104 i-cache-sets = <512>; // 32KiB(size)/32(line-size)=1024ways/2-way set
118 cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set
Dbcm2835.dtsi30 d-cache-sets = <256>; // 16KiB(size)/16(line-size)=1024ways/4-way set
33 i-cache-sets = <256>; // 16KiB(size)/16(line-size)=1024ways/4-way set
/Linux-v6.1/arch/sh/mm/
Dcache-sh7705.c33 unsigned long ways, waysize, addrstart; in cache_wback_all() local
35 ways = current_cpu_data.dcache.ways; in cache_wback_all()
58 } while (--ways); in cache_wback_all()
82 unsigned long ways, waysize, addrstart; in __flush_dcache_page() local
103 ways = current_cpu_data.dcache.ways; in __flush_dcache_page()
125 } while (--ways); in __flush_dcache_page()
Dtlb-sh3.c58 int i, ways = MMU_NTLB_WAYS; in local_flush_tlb_one() local
71 ways = 1; /* we already know the way .. */ in local_flush_tlb_one()
74 for (i = 0; i < ways; i++) in local_flush_tlb_one()
/Linux-v6.1/tools/perf/pmu-events/arch/arm64/arm/cortex-a75/
Dcache.json111 "PublicDescription": "Number of ways read in the instruction cache - Tag RAM",
114 "BriefDescription": "Number of ways read in the instruction cache - Tag RAM"
117 "PublicDescription": "Number of ways read in the instruction cache - Data RAM",
120 "BriefDescription": "Number of ways read in the instruction cache - Data RAM"
123 "PublicDescription": "Number of ways read in the instruction BTAC RAM",
126 "BriefDescription": "Number of ways read in the instruction BTAC RAM"
/Linux-v6.1/arch/mips/include/asm/octeon/
Dcvmx-l2c.h188 * the cache 'ways' that a core can evict from.
197 * @mask: The partitioning of the ways expressed as a binary
204 * @note If any ways are blocked for all cores and the HW blocks, then
205 * those ways will never have any cache lines evicted from them.
207 * ways regardless of the partitioning.
215 * the cache 'ways' that a core can evict from.
223 * @mask: The partitioning of the ways expressed as a binary
230 * @note If any ways are blocked for all cores and the HW blocks, then
231 * those ways will never have any cache lines evicted from them.
233 * ways regardless of the partitioning.
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/Linux-v6.1/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_npc_hash.c436 /* Check all the 4 ways for a free slot. */ in rvu_npc_exact_alloc_mem_table_entry()
438 for (i = 0; i < table->mem_table.ways; i++) { in rvu_npc_exact_alloc_mem_table_entry()
733 * @ways: MEM table ways.
746 static int rvu_npc_exact_add_to_list(struct rvu *rvu, enum npc_exact_opc_type opc_type, u8 ways, in rvu_npc_exact_add_to_list() argument
754 WARN_ON(ways >= NPC_EXACT_TBL_MAX_WAYS); in rvu_npc_exact_add_to_list()
776 lhead = &table->lhead_mem_tbl_entry[ways]; in rvu_npc_exact_add_to_list()
794 entry->ways = ways; in rvu_npc_exact_add_to_list()
830 * @ways: ways for MEM table.
834 static void rvu_npc_exact_mem_table_write(struct rvu *rvu, int blkaddr, u8 ways, in rvu_npc_exact_mem_table_write() argument
837 rvu_write64(rvu, blkaddr, NPC_AF_EXACT_MEM_ENTRY(ways, index), mdata); in rvu_npc_exact_mem_table_write()
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/Linux-v6.1/arch/arc/mm/
Dtlb.c137 int num_tlb = mmu->sets * mmu->ways; in local_flush_tlb_all()
569 unsigned int ver:8, ways:4, sets:4, res:3, sasid:1, pg_sz:4, in read_decode_mmu_bcr() member
573 ways:4, ver:8; in read_decode_mmu_bcr()
595 mmu->ways = 1 << mmu3->ways; in read_decode_mmu_bcr()
604 mmu->ways = mmu4->n_ways * 2; in read_decode_mmu_bcr()
626 p_mmu->sets * p_mmu->ways, p_mmu->sets, p_mmu->ways, in arc_mmu_mumbojumbo()
705 * However for walking WAYS of a SET, we need to know this
707 #define SET_WAY_TO_IDX(mmu, set, way) ((set) * mmu->ways + (way))
712 * time of lookup matching multiple ways.
724 int set, n_ways = mmu->ways; in do_tlb_overlap_fault()
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/Linux-v6.1/arch/sh/kernel/cpu/
Dinit.c126 unsigned long ways, waysize, addrstart; in cache_init() local
144 ways = 1; in cache_init()
147 ways = current_cpu_data.dcache.ways; in cache_init()
159 } while (--ways); in cache_init()
170 if (current_cpu_data.dcache.ways > 1) in cache_init()
200 CSHAPE((desc).way_size * (desc).ways, ilog2((desc).linesz), (desc).ways)
/Linux-v6.1/drivers/cxl/
Dacpi.c34 unsigned int ways; in cxl_acpi_cfmws_verify() local
51 rc = cxl_to_ways(cfmws->interleave_ways, &ways); in cxl_acpi_cfmws_verify()
53 dev_err(dev, "CFMWS Interleave Ways (%d) invalid\n", in cxl_acpi_cfmws_verify()
58 expected_len = struct_size(cfmws, interleave_targets, ways); in cxl_acpi_cfmws_verify()
91 unsigned int ways, i, ig; in cxl_parse_cfmws() local
105 rc = cxl_to_ways(cfmws->interleave_ways, &ways); in cxl_parse_cfmws()
111 for (i = 0; i < ways; i++) in cxl_parse_cfmws()
131 cxlrd = cxl_root_decoder_alloc(root_port, ways); in cxl_parse_cfmws()
142 cxld->interleave_ways = ways; in cxl_parse_cfmws()
147 if (ways == 1) in cxl_parse_cfmws()
Dcxl.h105 static inline int ways_to_cxl(unsigned int ways, u8 *iw) in ways_to_cxl() argument
107 if (ways > 16) in ways_to_cxl()
109 if (is_power_of_2(ways)) { in ways_to_cxl()
110 *iw = ilog2(ways); in ways_to_cxl()
113 if (ways % 3) in ways_to_cxl()
115 ways /= 3; in ways_to_cxl()
116 if (!is_power_of_2(ways)) in ways_to_cxl()
118 *iw = ilog2(ways) + 8; in ways_to_cxl()
/Linux-v6.1/drivers/cxl/core/
Dhdm.c514 int ways = cxlsd->cxld.interleave_ways; in cxlsd_set_targets() local
517 ways > 8 || ways > cxlsd->nr_targets, in cxlsd_set_targets()
518 "ways: %d overflows targets: %d\n", ways, in cxlsd_set_targets()
523 if (ways > 1) in cxlsd_set_targets()
525 if (ways > 2) in cxlsd_set_targets()
527 if (ways > 3) in cxlsd_set_targets()
529 if (ways > 4) in cxlsd_set_targets()
531 if (ways > 5) in cxlsd_set_targets()
533 if (ways > 6) in cxlsd_set_targets()
535 if (ways > 7) in cxlsd_set_targets()
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/Linux-v6.1/Documentation/devicetree/bindings/nios2/
Dnios2.txt23 - altr,tlb-num-ways: Specifies the number of set-associativity ways in the TLB.
52 altr,tlb-num-ways = <16>;
/Linux-v6.1/arch/arm/include/asm/
Dshmparam.h6 * This should be the size of the virtually indexed cache/ways,
8 * every size/ways bytes.
/Linux-v6.1/arch/powerpc/kvm/
De500_mmu.c42 if (unlikely(vcpu_e500->gtlb_nv[0] >= vcpu_e500->gtlb_params[0].ways)) in gtlb0_get_next_victim()
48 static int tlb0_set_base(gva_t addr, int sets, int ways) in tlb0_set_base() argument
53 set_base *= ways; in tlb0_set_base()
61 vcpu_e500->gtlb_params[0].ways); in gtlb0_set_base()
70 esel &= vcpu_e500->gtlb_params[0].ways - 1; in get_tlb_esel()
89 size = vcpu_e500->gtlb_params[0].ways; in kvmppc_e500_tlb_index()
358 esel &= vcpu_e500->gtlb_params[tlbsel].ways - 1; in kvmppc_e500_emul_tlbsx()
836 vcpu_e500->gtlb_params[0].ways = params.tlb_ways[0]; in kvm_vcpu_ioctl_config_tlb()
839 vcpu_e500->gtlb_params[1].ways = params.tlb_sizes[1]; in kvm_vcpu_ioctl_config_tlb()
876 vcpu->arch.tlbcfg[0] |= params[0].ways << TLBnCFG_ASSOC_SHIFT; in vcpu_mmu_init()
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/Linux-v6.1/arch/arm/mm/
Dcache-l2x0.c42 static u32 l2x0_way_mask; /* Bitmask of active ways */
784 unsigned way_size_bits, ways; in __l2c_init() local
811 /* Determine the number of ways */ in __l2c_init()
817 ways = 16; in __l2c_init()
819 ways = 8; in __l2c_init()
824 ways = (aux >> 13) & 0xf; in __l2c_init()
828 ways = (aux >> 13) & 0xf; in __l2c_init()
829 ways = 2 << ((ways + 1) >> 2); in __l2c_init()
833 /* Assume unknown chips have 8 ways */ in __l2c_init()
834 ways = 8; in __l2c_init()
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/Linux-v6.1/arch/sh/include/asm/
Dcache.h21 unsigned int ways; /* Number of cache ways */ member
/Linux-v6.1/include/linux/soc/qcom/
Dllcc-qcom.h62 * @ways_status_reg: Status register address to read the error ways
65 * @ways_mask: Mask value to get the error ways
67 * @ways_shift: Shift value to get the error ways

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