Home
last modified time | relevance | path

Searched full:vop (Results 1 – 25 of 59) sorted by relevance

123

/Linux-v6.1/drivers/gpu/drm/rockchip/
Drockchip_drm_vop.c45 #define VOP_WIN_SET(vop, win, name, v) \ argument
46 vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name)
47 #define VOP_SCL_SET(vop, win, name, v) \ argument
48 vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
49 #define VOP_SCL_SET_EXT(vop, win, name, v) \ argument
50 vop_reg_set(vop, &win->phy->scl->ext->name, \
53 #define VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, name, v) \ argument
56 vop_reg_set(vop, &win_yuv2yuv->name, 0, ~0, v, #name); \
59 #define VOP_WIN_YUV2YUV_COEFFICIENT_SET(vop, win_yuv2yuv, name, v) \ argument
62 vop_reg_set(vop, &win_yuv2yuv->phy->name, win_yuv2yuv->base, ~0, v, #name); \
[all …]
Danalogix_dp-rockchip.c46 * @lcdsel_big: reg value of selecting vop big for eDP
47 * @lcdsel_lit: reg value of selecting vop little for eDP
129 /* VOP couldn't output YUV video format for eDP rightly */ in rockchip_dp_get_modes()
203 DRM_DEV_DEBUG(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG"); in rockchip_dp_drm_encoder_enable()
250 * The hardware IC designed that VOP must output the RGB10 video in rockchip_dp_drm_encoder_atomic_check()
252 * then eDP controller should cut down the video data, not via VOP in rockchip_dp_drm_encoder_atomic_check()
253 * controller, that's why we need to hardcode the VOP output mode in rockchip_dp_drm_encoder_atomic_check()
Drockchip_vop_reg.c949 * rk3399 vop big windows register layout is same as rk3288, but we
1106 { .compatible = "rockchip,rk3036-vop",
1108 { .compatible = "rockchip,rk3126-vop",
1110 { .compatible = "rockchip,px30-vop-big",
1112 { .compatible = "rockchip,px30-vop-lit",
1114 { .compatible = "rockchip,rk3066-vop",
1116 { .compatible = "rockchip,rk3188-vop",
1118 { .compatible = "rockchip,rk3288-vop",
1120 { .compatible = "rockchip,rk3368-vop",
1122 { .compatible = "rockchip,rk3366-vop",
[all …]
Drockchip_lvds.c318 DRM_DEV_ERROR(lvds->dev, "failed to set VOP source: %d\n", ret); in rk3288_lvds_encoder_enable()
380 int vop; in px30_lvds_set_vop_source() local
382 vop = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder); in px30_lvds_set_vop_source()
383 if (vop < 0) in px30_lvds_set_vop_source()
384 return vop; in px30_lvds_set_vop_source()
388 PX30_LVDS_VOP_SEL(vop)); in px30_lvds_set_vop_source()
415 DRM_DEV_ERROR(lvds->dev, "failed to set VOP source: %d\n", ret); in px30_lvds_encoder_enable()
DKconfig25 bool "Rockchip VOP driver"
28 This selects support for the VOP driver. You should enable it
Drockchip_vop2_reg.c126 * rk3568 vop with 2 cluster, 2 esmart win, 2 smart win.
250 .compatible = "rockchip,rk3566-vop",
253 .compatible = "rockchip,rk3568-vop",
Drockchip_drm_drv.c298 * Check if a vop endpoint is leading to a rockchip subdriver or bridge.
302 * @ep: endpoint of a rockchip vop
423 "No available vop found for display-subsystem.\n"); in rockchip_drm_platform_of_probe()
Ddw_hdmi-rockchip.c63 * @lcdsel_big: reg value of selecting vop big for HDMI
64 * @lcdsel_lit: reg value of selecting vop little for HDMI
310 DRM_DEV_DEBUG(hdmi->dev, "vop %s output to hdmi\n", in dw_hdmi_rockchip_encoder_enable()
/Linux-v6.1/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.yaml4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
7 title: Rockchip SoC display controller (VOP)
10 VOP (Video Output Processor) is the display controller for the Rockchip
21 - rockchip,px30-vop-big
22 - rockchip,px30-vop-lit
23 - rockchip,rk3036-vop
24 - rockchip,rk3066-vop
25 - rockchip,rk3126-vop
26 - rockchip,rk3188-vop
27 - rockchip,rk3228-vop
[all …]
Drockchip-vop2.yaml21 - rockchip,rk3566-vop
22 - rockchip,rk3568-vop
35 - const: vop
41 The VOP interrupt is shared by several interrupt sources, such as
109 vop: vop@fe040000 {
110 compatible = "rockchip,rk3568-vop";
112 reg-names = "vop", "gamma-lut";
Drockchip-drm.yaml15 vop devices or other display interface nodes that comprise the
28 of vop devices. vop definitions as defined in
29 Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml
Drockchip-lvds.txt36 - video port 0 for the VOP input, the remote endpoint maybe vopb or vopl
Dcdn-dp-rockchip.txt26 contained 2 endpoints, connecting to the output of vop.
Danalogix_dp-rockchip.txt28 Port 0: contained 2 endpoints, connecting to the output of vop.
Ddw_mipi_dsi_rockchip.txt21 - video port 0 for the VOP input, the remote endpoint maybe vopb or vopl
Drockchip,dw-hdmi.yaml106 description: Connection to the VOP
/Linux-v6.1/drivers/media/pci/solo6x10/
Dsolo6x10-v4l2-enc.c143 u8 *vop; in solo_update_mode() local
153 vop = vop_6110_ntsc_cif; in solo_update_mode()
156 vop = vop_6110_pal_cif; in solo_update_mode()
161 vop = vop_6010_ntsc_cif; in solo_update_mode()
164 vop = vop_6010_pal_cif; in solo_update_mode()
174 vop = vop_6110_ntsc_d1; in solo_update_mode()
177 vop = vop_6110_pal_d1; in solo_update_mode()
182 vop = vop_6010_ntsc_d1; in solo_update_mode()
185 vop = vop_6010_pal_d1; in solo_update_mode()
191 memcpy(solo_enc->vop, vop, vop_len); in solo_update_mode()
[all …]
Dsolo6x10.h162 /* VOP stuff */
163 u8 vop[64]; member
/Linux-v6.1/arch/arm64/boot/dts/rockchip/
Drk3566.dtsi33 &vop {
34 compatible = "rockchip,rk3566-vop";
Drk3568.dtsi263 &vop {
264 compatible = "rockchip,rk3568-vop";
/Linux-v6.1/drivers/macintosh/
Dwindfarm_mpu.h54 fu16 voph; /* 0x38 - Vop High */
55 fu16 vopl; /* 0x3a - Vop Low */
/Linux-v6.1/Documentation/devicetree/bindings/pwm/
Dpwm-rockchip.yaml18 - const: rockchip,vop-pwm
/Linux-v6.1/arch/arm/boot/dts/
Drk3066a.dtsi64 vop0: vop@1010c000 {
65 compatible = "rockchip,rk3066-vop";
90 vop1: vop@1010e000 {
91 compatible = "rockchip,rk3066-vop";
Drk3188.dtsi115 vop0: vop@1010c000 {
116 compatible = "rockchip,rk3188-vop";
132 vop1: vop@1010e000 {
133 compatible = "rockchip,rk3188-vop";
/Linux-v6.1/drivers/soc/mediatek/
Dmtk-svs.c863 u32 i, j, *vop, vop74, vop30, turn_pt = svsb->turn_pt; in svs_get_bank_volts_v3() local
880 vop = (shift_byte < REG_BYTES) ? &vop30 : in svs_get_bank_volts_v3()
882 svsb->volt[i] = (*vop >> b_sft) & GENMASK(7, 0); in svs_get_bank_volts_v3()
892 vop = (shift_byte < REG_BYTES) ? &vop30 : in svs_get_bank_volts_v3()
894 svsb->volt[i] = (*vop >> b_sft) & GENMASK(7, 0); in svs_get_bank_volts_v3()
914 vop = (shift_byte < REG_BYTES) ? &vop30 : in svs_get_bank_volts_v3()
916 svsb->volt[i] = (*vop >> b_sft) & GENMASK(7, 0); in svs_get_bank_volts_v3()
931 vop = (shift_byte < REG_BYTES) ? &vop30 : in svs_get_bank_volts_v3()
933 svsb->volt[i] = (*vop >> b_sft) & GENMASK(7, 0); in svs_get_bank_volts_v3()

123