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/Linux-v5.15/drivers/cpufreq/
Dpmac64-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
4 * and Markus Demleitner <msdemlei@cl.uni-heidelberg.de>
73 * the various frequencies, retrieved from the device-tree
93 * SMU based voltage switching for Neo2 platforms
108 * Platform function based voltage/vdnap switching for Neo2
145 * SCOM based frequency switching for 970FX rev3
152 /* If frequency is going up, first ramp up the voltage */ in g5_scom_switch_freq()
182 /* If frequency is going down, last ramp the voltage */ in g5_scom_switch_freq()
187 ppc_proc_freq = g5_cpu_freqs[speed_mode].frequency * 1000ul; in g5_scom_switch_freq()
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De_powersaver.c1 // SPDX-License-Identifier: GPL-2.0-only
61 return -ENOMEM; in eps_acpi_init()
63 if (!zalloc_cpumask_var(&eps_acpi_cpu_perf->shared_cpu_map, in eps_acpi_init()
67 return -ENOMEM; in eps_acpi_init()
71 free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map); in eps_acpi_init()
74 return -EIO; in eps_acpi_init()
83 free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map); in eps_acpi_exit()
102 /* Return current frequency */ in eps_get()
104 return centaur->fsb * ((lo >> 8) & 0xff); in eps_get()
122 return -ENODEV; in eps_set_state()
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Dlonghaul.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * (C) 2001-2004 Dave Jones.
12 * LONGHAUL MSR for purpose of both frequency and voltage scaling.
13 * Present in Samuel 2 (steppings 1-7 only) (C5B), and Ezra (C5C).
16 * It is present in Ezra-T (C5M), Nehemiah (C5X) and above.
146 /* Change frequency on next halt or sleep */ in do_longhaul1()
168 /* Setup new frequency */ in do_powersaver()
175 /* Setup new voltage */ in do_powersaver()
180 /* Raise voltage if necessary */ in do_powersaver()
184 /* Change voltage */ in do_powersaver()
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Dspeedstep-centrino.c1 // SPDX-License-Identifier: GPL-2.0-only
33 #define MAINTAINER "linux-pm@vger.kernel.org"
69 struct cpufreq_frequency_table *op_points; /* clock/voltage pairs */
83 frequency/voltage operating point; frequency in MHz, volts in mV.
87 .frequency = (mhz) * 1000, \
88 .driver_data = (((mhz)/100) << 8) | ((mv - 700) / 16) \
92 * These voltage tables were derived from the Intel Pentium M
98 /* Ultra Low Voltage Intel Pentium M processor 900MHz (Banias) */
104 { .frequency = CPUFREQ_TABLE_END }
107 /* Ultra Low Voltage Intel Pentium M processor 1000MHz (Banias) */
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DKconfig.arm1 # SPDX-License-Identifier: GPL-2.0-only
3 # ARM CPU Frequency scaling drivers
23 bool "Frequency Invariance support for CPPC cpufreq driver"
27 This extends frequency invariance support in the CPPC cpufreq driver,
42 module will be called sun50i-cpufreq-nvmem.
49 The Armada 37xx PMU supports 4 frequency and VDD levels.
87 Some Broadcom STB SoCs use a co-processor running proprietary firmware
88 ("AVS") to handle voltage and frequency scaling. This driver provides
94 tristate "Calxeda Highbank-based"
119 based on cpufreq-dt.
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Dpmac32-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
41 * init/main.c to make it non-init before enabling DEBUG_FREQ
60 * Different models uses different mechanisms to switch the frequency
75 /* There are only two frequency states for each processor. Values
115 /* ramping up, set voltage first */ in cpu_750fx_cpu_speed()
120 /* tweak L2 for high voltage */ in cpu_750fx_cpu_speed()
131 /* tweak L2 for low voltage */ in cpu_750fx_cpu_speed()
138 /* ramping down, set voltage last */ in cpu_750fx_cpu_speed()
158 /* ramping up, set voltage first */ in dfs_set_cpu_speed()
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Darmada-37xx-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0+
3 * CPU frequency scaling support for Armada 37xx platform.
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
26 #include "cpufreq-dt.h"
79 /* AVS value for the corresponding voltage (in mV) */
126 pr_err("Unsupported CPU frequency %d MHz\n", freq/1000000); in armada_37xx_cpu_freq_info_get()
168 * Set cpu divider based on the pre-computed array in in armada37xx_cpufreq_dvfs_setup()
188 * Find out the armada 37x supported AVS value whose voltage value is
189 * the round-up closest to the target voltage value.
195 /* Find out the round-up closest supported voltage value */ in armada_37xx_avs_val_match()
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/Linux-v5.15/drivers/memory/samsung/
Dexynos5422-dmc.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/devfreq-event.h>
100 * struct dmc_opp_table - Operating level desciption
101 * @freq_hz: target frequency in Hz
102 * @volt_uv: target voltage in uV
104 * Covers frequency and voltage settings of the DMC operating mode.
112 * struct exynos5_dmc - main structure describing DMC device
119 * @lock: protects curr_rate and frequency/voltage setting section
120 * @curr_rate: current frequency
121 * @curr_volt: current voltage
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/Linux-v5.15/Documentation/power/
Dopp.rst5 (C) 2009-2010 Nishanth Menon <nm@ti.com>, Texas Instruments Incorporated
20 -------------------------------------------------
22 Complex SoCs of today consists of a multiple sub-modules working in conjunction.
24 need to function at their highest performing frequency all the time. To
25 facilitate this, sub-modules in a SoC are grouped into domains, allowing some
26 domains to run at lower voltage and frequency while other domains run at
27 voltage/frequency pairs that are higher.
29 The set of discrete tuples consisting of frequency and voltage pairs that
36 {300MHz at minimum voltage of 1V}, {800MHz at minimum voltage of 1.2V},
37 {1GHz at minimum voltage of 1.3V}
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/Linux-v5.15/Documentation/devicetree/bindings/mmc/
Dmmc-spi-slot.txt7 - spi-max-frequency : maximum frequency for this device (Hz).
10 - voltage-ranges : two cells are required, first cell specifies minimum
11 slot voltage (mV), second cell specifies maximum slot voltage (mV).
13 - gpios : may specify GPIOs in this order: Card-Detect GPIO,
14 Write-Protect GPIO. Note that this does not follow the
19 mmc-slot@0 {
20 compatible = "fsl,mpc8323rdb-mmc-slot",
21 "mmc-spi-slot";
25 voltage-ranges = <3300 3300>;
26 spi-max-frequency = <50000000>;
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Dfsl-esdhc.txt7 by mmc.txt and the properties used by the sdhci-esdhc driver.
10 - compatible : should be "fsl,esdhc", or "fsl,<chip>-esdhc".
12 "fsl,mpc8536-esdhc"
13 "fsl,mpc8378-esdhc"
14 "fsl,p2020-esdhc"
15 "fsl,p4080-esdhc"
16 "fsl,t1040-esdhc"
17 "fsl,t4240-esdhc"
19 "fsl,ls1012a-esdhc"
20 "fsl,ls1028a-esdhc"
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/Linux-v5.15/Documentation/devicetree/bindings/media/i2c/
Dovti,ov02a10.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Dongchun Zhu <dongchun.zhu@mediatek.com>
13 description: |-
14 The Omnivision OV02A10 is a low-cost, high performance, 1/5-inch, 2 megapixel
17 @ 1600x1200 (UXGA) resolution transferred over a 1-lane MIPI interface. The
18 sensor output is available via CSI-2 serial data output.
21 - $ref: /schemas/media/video-interface-devices.yaml#
33 clock-names:
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Dmipi-ccs.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2014--2020 Intel Corporation
4 ---
5 $id: http://devicetree.org/schemas/media/i2c/mipi-ccs.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sakari Ailus <sakari.ailus@linux.intel.com>
17 <URL:https://www.mipi.org/specifications/camera-command-set>.
24 Documentation/devicetree/bindings/media/video-interfaces.txt .
29 - items:
30 - const: mipi-ccs-1.1
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/Linux-v5.15/Documentation/devicetree/bindings/sound/
Dqcom,wcd934x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9340/WCD9341 Codec is a standalone Hi-Fi audio codec IC.
14 It has in-built Soundwire controller, pin controller, interrupt mux and
27 reset-gpios:
31 slim-ifc-dev: true
36 clock-names:
39 vdd-buck-supply:
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Dcs42l56.txt5 - compatible : "cirrus,cs42l56"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VCP-supply, VLDO-supply : power supplies for the device,
14 - cirrus,gpio-nreset : GPIO controller's phandle and the number
17 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
19 register, not the actual frequency. The frequency is determined by the following.
20 Frequency = MCLK / 4 * (N+2)
22 MCLK = Where MCLK is the frequency of the mclk signal after the MCLKDIV2 circuit.
24 - cirrus,ain1a-ref-cfg, ain1b-ref-cfg : boolean, If present, AIN1A or AIN1B are configured
25 as a pseudo-differential input referenced to AIN1REF/AIN3A.
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/Linux-v5.15/arch/arm/mach-omap2/
Domap_opp_data.h4 * Copyright (C) 2009-2010 Texas Instruments Incorporated - https://www.ti.com/
24 #include "voltage.h"
33 * struct omap_opp_def - OMAP OPP Definition
35 * @freq: Frequency in hertz corresponding to this OPP
36 * @u_volt: Nominal voltage in microvolts corresponding to this OPP
37 * @default_available: True/false - is this OPP available by default
39 * OMAP SOCs have a standard set of tuples consisting of frequency and voltage
40 * pairs that the device will support per voltage domain. This is called
43 * domain, you can have a set of {frequency, voltage} pairs and this is denoted
47 * which belongs to a voltage domain may define their own set of OPPs on top
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/Linux-v5.15/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgm20b.c89 #define DFS_DET_RANGE 6 /* -2^6 ... 2^6-1 */
90 #define SDM_DIN_RANGE 12 /* -2^12 ... 2^12-1 */
99 .coeff_slope = -165230,
136 /* safe frequency we can use at minimum voltage */
162 struct nvkm_subdev *subdev = &clk->base.base.subdev; in gm20b_pllg_read_mnp()
163 struct nvkm_device *device = subdev->device; in gm20b_pllg_read_mnp()
166 gk20a_pllg_read_mnp(&clk->base, &pll->base); in gm20b_pllg_read_mnp()
168 pll->sdm_din = (val >> GPCPLL_CFG2_SDM_DIN_SHIFT) & in gm20b_pllg_read_mnp()
175 struct nvkm_device *device = clk->base.base.subdev.device; in gm20b_pllg_write_mnp()
178 pll->sdm_din << GPCPLL_CFG2_SDM_DIN_SHIFT); in gm20b_pllg_write_mnp()
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/Linux-v5.15/arch/arm/boot/dts/
Dimx28-cfa10049.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
8 * need to include the CFA-10036 DTS.
10 #include "imx28-cfa10036.dts"
13 model = "Crystalfontz CFA-10049 Board";
17 compatible = "i2c-mux-gpio";
18 #address-cells = <1>;
19 #size-cells = <0>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&i2cmux_pins_cfa10049>;
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Dimx28-tx28.dts3 * Copyright 2013-2017 Lothar Waßmann <LW@KARO-electronics.de>
5 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include <dt-bindings/gpio/gpio.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 model = "Ka-Ro electronics TX28 module";
70 reg = <0x40000000 0>; /* will be filled in by U-Boot */
74 compatible = "w1-gpio";
79 reg_usb0_vbus: regulator-usb0-vbus {
80 compatible = "regulator-fixed";
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/Linux-v5.15/Documentation/devicetree/bindings/opp/
Dopp-v1.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 Devices work at voltage-current-frequency combinations and some implementations
19 This binding only supports voltage-frequency pairs.
24 operating-points:
25 $ref: /schemas/types.yaml#/definitions/uint32-matrix
28 - description: Frequency in kHz
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/Linux-v5.15/Documentation/devicetree/bindings/regulator/
Dmps,mp886x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Monolithic Power Systems MP8867/MP8869 voltage regulator
10 - Jisheng Zhang <jszhang@kernel.org>
13 - $ref: regulator.yaml#
18 - mps,mp8867
19 - mps,mp8869
24 enable-gpios:
28 mps,fb-voltage-divider:
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/Linux-v5.15/Documentation/devicetree/bindings/devfreq/
Dexynos-bus.txt1 * Generic Exynos Bus frequency device
4 and sub-blocks in SoC. Most Exynos SoCs share the common architecture
6 and a power line, which are able to change the clock frequency
9 is able to measure the current load of sub-blocks.
11 The Exynos SoC includes the various sub-blocks which have the each AXI bus.
13 power line. The power line might be shared among one more sub-blocks.
14 So, we can divide into two type of device as the role of each sub-block.
16 - parent bus device
17 - passive bus device
20 The parent bus device can only change the voltage of shared power line
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/Linux-v5.15/drivers/thermal/
Ddevfreq_cooling.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2014-2015 ARM Limited
9 * - If OPPs are added or removed after devfreq cooling has
28 * struct devfreq_cooling_device - Devfreq cooling device
45 * @req_max_freq: PM QoS request for limiting the maximum frequency
65 struct devfreq_cooling_device *dfc = cdev->devdata; in devfreq_cooling_get_max_state()
67 *state = dfc->max_state; in devfreq_cooling_get_max_state()
75 struct devfreq_cooling_device *dfc = cdev->devdata; in devfreq_cooling_get_cur_state()
77 *state = dfc->cooling_state; in devfreq_cooling_get_cur_state()
85 struct devfreq_cooling_device *dfc = cdev->devdata; in devfreq_cooling_set_cur_state()
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/Linux-v5.15/Documentation/devicetree/bindings/iio/dac/
Dadi,ad5755.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD5755 Multi-Channel DAC
10 - Sean Nyekjaer <sean.nyekjaer@prevas.dk>
15 - adi,ad5755
16 - adi,ad5755-1
17 - adi,ad5757
18 - adi,ad5735
19 - adi,ad5737
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/Linux-v5.15/Documentation/devicetree/bindings/net/nfc/
Dtrf7970a.txt4 - compatible: Should be "ti,trf7970a".
5 - spi-max-frequency: Maximum SPI frequency (<= 2000000).
6 - interrupts: A single interrupt specifier.
7 - ti,enable-gpios: One or two GPIO entries used for 'EN' and 'EN2' pins on the
9 - vin-supply: Regulator for supply voltage to VIN pin
12 - pinctrl-names: Contains only one value - "default".
13 - pintctrl-0: Specifies the pin control groups used for this controller.
14 - autosuspend-delay: Specify autosuspend delay in milliseconds.
15 - irq-status-read-quirk: Specify that the trf7970a being used has the
17 - en2-rf-quirk: Specify that the trf7970a being used has the "EN2 RF"
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