Searched full:versal (Results 1 – 19 of 19) sorted by relevance
| /Linux-v5.15/Documentation/devicetree/bindings/firmware/xilinx/ |
| D | xlnx,zynqmp-firmware.yaml | 26 - description: For implementations complying for Versal.
27 const: xlnx,versal-firmware
42 $ref: /schemas/fpga/xlnx,versal-fpga.yaml#
54 $ref: /schemas/clock/xlnx,versal-clk.yaml#
55 description: The clock controller is a hardware block of Xilinx versal
69 versal-firmware {
70 compatible = "xlnx,versal-firmware";
74 compatible = "xlnx,versal-fpga";
83 compatible = "xlnx,versal-clk";
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| /Linux-v5.15/Documentation/devicetree/bindings/fpga/ |
| D | xlnx,versal-fpga.yaml | 4 $id: http://devicetree.org/schemas/fpga/xlnx,versal-fpga.yaml#
7 title: Xilinx Versal FPGA driver.
13 Device Tree Versal FPGA bindings for the Versal SoC, controlled
20 - xlnx,versal-fpga
30 compatible = "xlnx,versal-fpga";
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| /Linux-v5.15/Documentation/devicetree/bindings/reset/ |
| D | xlnx,zynqmp-reset.txt | 2 = Zynq UltraScale+ MPSoC and Versal reset driver binding =
4 The Zynq UltraScale+ MPSoC and Versal has several different resets.
14 "xlnx,versal-reset" for Versal platform
43 For list of all valid reset indices for Versal see
44 <dt-bindings/reset/xlnx-versal-resets.h>
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| /Linux-v5.15/Documentation/devicetree/bindings/clock/ |
| D | xlnx,versal-clk.yaml | 4 $id: http://devicetree.org/schemas/clock/xlnx,versal-clk.yaml#
7 title: Xilinx Versal clock controller
15 The clock controller is a hardware block of Xilinx versal clock tree. It
23 const: xlnx,versal-clk
58 compatible = "xlnx,versal-clk";
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| /Linux-v5.15/Documentation/devicetree/bindings/pci/ |
| D | xilinx-versal-cpm.yaml | 4 $id: http://devicetree.org/schemas/pci/xilinx-versal-cpm.yaml#
7 title: CPM Host Controller device tree for Xilinx Versal SoCs
17 const: xlnx,versal-cpm-host-1.00
70 versal {
74 compatible = "xlnx,versal-cpm-host-1.00";
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| /Linux-v5.15/drivers/fpga/ |
| D | versal-fpga.c | 57 mgr = devm_fpga_mgr_create(dev, "Xilinx Versal FPGA Manager", in versal_fpga_probe()
66 { .compatible = "xlnx,versal-fpga", },
82 MODULE_DESCRIPTION("Xilinx Versal FPGA Manager");
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| D | Kconfig | 238 tristate "Xilinx Versal FPGA"
242 Xilinx Versal SoC. This driver uses the firmware interface to
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| D | Makefile | 21 obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o
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| /Linux-v5.15/Documentation/devicetree/bindings/mmc/ |
| D | arasan,sdhci.yaml | 29 - xlnx,versal-8.9a
60 - const: xlnx,versal-8.9a # Versal SDHCI 8.9a PHY
225 compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
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| /Linux-v5.15/drivers/pci/controller/ |
| D | Kconfig | 104 bool "Xilinx Versal CPM host bridge support"
109 Xilinx Versal CPM host bridge.
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| D | pcie-xilinx-cpm.c | 3 * PCIe host controller driver for Xilinx Versal CPM DMA Bridge
595 { .compatible = "xlnx,versal-cpm-host-1.00", },
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| /Linux-v5.15/drivers/usb/dwc3/ |
| D | dwc3-xilinx.c | 34 /* Versal USB Reset ID */
212 .compatible = "xlnx,versal-dwc3",
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| D | Kconfig | 158 This driver handles both ZynqMP and Versal SoC operations.
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| /Linux-v5.15/Documentation/devicetree/bindings/usb/ |
| D | dwc3-xilinx.txt | 4 - compatible: May contain "xlnx,zynqmp-dwc3" or "xlnx,versal-dwc3"
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| /Linux-v5.15/drivers/reset/ |
| D | reset-zynqmp.c | 124 { .compatible = "xlnx,versal-reset", .data = &versal_reset_data, },
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| /Linux-v5.15/drivers/firmware/xilinx/ |
| D | zynqmp.c | 1361 np = of_find_compatible_node(NULL, NULL, "xlnx,versal"); in zynqmp_firmware_probe()
1430 {.compatible = "xlnx,versal-firmware"},
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| /Linux-v5.15/drivers/clk/zynqmp/ |
| D | clkc.c | 780 {.compatible = "xlnx,versal-clk"},
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| /Linux-v5.15/drivers/mmc/host/ |
| D | sdhci-of-arasan.c | 1081 if (of_device_is_compatible(dev->of_node, "xlnx,versal-8.9a")) { in arasan_dt_parse_clk_phases()
1286 .compatible = "xlnx,versal-8.9a",
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| /Linux-v5.15/drivers/gpio/ |
| D | gpio-zynq.c | 876 { .compatible = "xlnx,versal-gpio-1.0", .data = &versal_gpio_def },
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