Searched full:vd1 (Results 1 – 12 of 12) sorted by relevance
98 /* VD1 Preblend vertical start/end */ in meson_g12a_crtc_atomic_enable()138 /* VD1 Preblend vertical start/end */ in meson_crtc_atomic_enable()391 /* Update the VD1 registers */ in meson_crtc_irq()653 /* Enable VD1 */ in meson_crtc_irq()
460 /* Disable VD1 AFBC */ in meson_viu_init()461 /* di_mif0_en=0 mif0_to_vpp_en=0 di_mad_en=0 and afbc vd1 set=0*/ in meson_viu_init()
734 /* Disable VD1 */ in meson_overlay_atomic_disable()
37 * vd1---| |-| | | VENC /---------|----VDAC
17 | vd1 _______ _____________ _________________ | |
18 | vd1 _______ _____________ _________________ | |
1215 /* Generate VD0 on the last line of the image and VD1 on the in ccdc_configure()1657 /* Emulate a VD1 interrupt for BT.656 mode, as we can't stop the CCDC in in ccdc_vd0_isr()1658 * the VD1 interrupt handler in that mode without risking a CCDC stall in ccdc_vd0_isr()1691 * ccdc_vd1_isr - Handle VD1 event1699 * from the embedded sync codes. The VD0 and VD1 interrupts are thus in ccdc_vd1_isr()1702 * disable the CCDC at VD1 time, as no VD0 interrupt would be generated in ccdc_vd1_isr()
51 #define SPX5_PORT_VD1 (SPX5_PORT_CPU + 3) /* VD1/Port 68 used for AFI/OAM */
543 static void pxad_desc_chain(struct virt_dma_desc *vd1, in pxad_desc_chain() argument546 struct pxad_desc_sw *desc1 = to_pxad_sw_desc(vd1); in pxad_desc_chain()
1425 0x1c4000 - 0x1c6bff: VD1 \1427 0x1c6d00 - 0x1c6dff: VD1 \
1708 /* Use falling edge to sample VD1-VD4 from 54 MHz to 108 MHz */
794 /* VD1 interrupt */ in vpfe_clear_intr()
