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/Linux-v6.1/Documentation/driver-api/usb/
Dwriting_musb_glue_layer.rst2 Writing a MUSB Glue Layer
10 The Linux MUSB subsystem is part of the larger Linux USB subsystem. It
11 provides support for embedded USB Device Controllers (UDC) that do not
15 Instead, these embedded UDC rely on the USB On-the-Go (OTG)
17 reference design used in most cases is the Multipoint USB Highspeed
18 Dual-Role Controller (MUSB HDRC) found in the Mentor Graphics Inventra™
21 As a self-taught exercise I have written an MUSB glue layer for the
22 Ingenic JZ4740 SoC, modelled after the many MUSB glue layers in the
24 ``drivers/usb/musb/jz4740.c``. In this documentation I will walk through the
25 basics of the ``jz4740.c`` glue layer, explaining the different pieces and
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/Linux-v6.1/drivers/usb/dwc2/
Dpci.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * pci.c - DesignWare HS OTG Controller PCI driver
5 * Copyright (C) 2004-2013 Synopsys, Inc.
20 #include <linux/usb.h>
22 #include <linux/usb/hcd.h>
23 #include <linux/usb/ch11.h>
25 #include <linux/usb/usb_phy_generic.h>
29 static const char dwc2_driver_name[] = "dwc2-pci";
37 * dwc2_pci_remove() - Provides the cleanup entry points for the DWC_otg PCI
44 struct dwc2_pci_glue *glue = pci_get_drvdata(pci); in dwc2_pci_remove() local
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/Linux-v6.1/Documentation/devicetree/bindings/usb/
Ddwc3-st.txt1 ST DWC3 glue logic
3 This file documents the parameters for the dwc3-st driver.
4 This driver controls the glue logic used to configure the dwc3 core on
8 - compatible : must be "st,stih407-dwc3"
9 - reg : glue logic base address and USB syscfg ctrl register offset
10 - reg-names : should be "reg-glue" and "syscfg-reg"
11 - st,syscon : should be phandle to system configuration node which
12 encompasses the glue registers
13 - resets : list of phandle and reset specifier pairs. There should be two entries, one
15 - reset-names : list of reset signal names. Names should be "powerdown" and "softreset"
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Damlogic,meson-g12a-usb-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic Meson G12A DWC3 USB SoC Controller Glue
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3
15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY.
20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
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Dam33xx-usb.txt3 - compatible: ti,am33xx-usb
4 - reg: offset and length of the usbss register sets
5 - ti,hwmods : must be "usb_otg_hs"
7 The glue layer contains multiple child nodes. It is required to have
8 at least a control module node, USB node and a PHY node. The second USB
13 - compatible: ti,am335x-usb-ctrl-module
14 - reg: offset and length of the "USB control registers" in the "Control
15 Module" block. A second offset and length for the USB wake up control
17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
18 the USB wake up control register.
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Domap-usb.txt1 OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS
3 OMAP MUSB GLUE
4 - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
5 - ti,hwmods : must be "usb_otg_hs"
6 - multipoint : Should be "1" indicating the musb controller supports
7 multipoint. This is a MUSB configuration-specific setting.
8 - num-eps : Specifies the number of endpoints. This is also a
9 MUSB configuration-specific setting. Should be set to "16"
10 - ram-bits : Specifies the ram address size. Should be set to "12"
11 - interface-type : This is a board specific setting to describe the type of
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Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: "usb-drd.yaml"
17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
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Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: "usb-xhci.yaml"
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
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/Linux-v6.1/drivers/usb/musb/
Dsunxi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Allwinner sun4i MUSB Glue Layer
18 #include <linux/phy/phy-sun4i-usb.h>
22 #include <linux/usb/musb.h>
23 #include <linux/usb/of.h>
24 #include <linux/usb/usb_phy_generic.h>
92 struct sunxi_glue *glue = container_of(work, struct sunxi_glue, work); in sunxi_musb_work() local
95 if (!test_bit(SUNXI_MUSB_FL_ENABLED, &glue->flags)) in sunxi_musb_work()
98 if (test_and_clear_bit(SUNXI_MUSB_FL_HOSTMODE_PEND, &glue->flags)) { in sunxi_musb_work()
99 struct musb *musb = glue->musb; in sunxi_musb_work()
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Djz4740.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Ingenic JZ4740 "glue layer"
9 #include <linux/dma-mapping.h>
15 #include <linux/usb/role.h>
16 #include <linux/usb/usb_phy_generic.h>
33 if (IS_ENABLED(CONFIG_USB_INVENTRA_DMA) && musb->dma_controller) in jz4740_musb_interrupt()
34 retval_dma = dma_controller_irq(irq, musb->dma_controller); in jz4740_musb_interrupt()
36 spin_lock_irqsave(&musb->lock, flags); in jz4740_musb_interrupt()
38 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); in jz4740_musb_interrupt()
39 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); in jz4740_musb_interrupt()
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Domap2430.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005-2007 by Texas Instruments
19 #include <linux/dma-mapping.h>
23 #include <linux/usb/musb.h>
40 #define glue_to_musb(g) platform_get_drvdata(g->musb)
49 l = musb_readl(musb->mregs, OTG_FORCESTDBY); in omap2430_low_level_exit()
51 musb_writel(musb->mregs, OTG_FORCESTDBY, l); in omap2430_low_level_exit()
58 l = musb_readl(musb->mregs, OTG_FORCESTDBY); in omap2430_low_level_init()
60 musb_writel(musb->mregs, OTG_FORCESTDBY, l); in omap2430_low_level_init()
65 struct omap2430_glue *glue = _glue; in omap2430_musb_mailbox() local
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Dmediatek.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/dma-mapping.h>
15 #include <linux/usb/role.h>
16 #include <linux/usb/usb_phy_generic.h>
54 static int mtk_musb_clks_get(struct mtk_glue *glue) in mtk_musb_clks_get() argument
56 struct device *dev = glue->dev; in mtk_musb_clks_get()
58 glue->clks[0].id = "main"; in mtk_musb_clks_get()
59 glue->clks[1].id = "mcu"; in mtk_musb_clks_get()
60 glue->clks[2].id = "univpll"; in mtk_musb_clks_get()
62 return devm_clk_bulk_get(dev, MTK_MUSB_CLKS_NUM, glue->clks); in mtk_musb_clks_get()
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Dda8xx.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments DA8xx/OMAP-L1x "glue layer"
5 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
7 * Based on the DaVinci "glue layer" code.
8 * Copyright (C) 2005-2006 by Texas Instruments
23 #include <linux/dma-mapping.h>
24 #include <linux/usb/usb_phy_generic.h>
32 /* USB 2.0 OTG module registers */
46 #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
54 /* USB interrupt register bits */
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Dam35x.c1 // SPDX-License-Identifier: GPL-2.0
4 * Texas Instruments AM35x "glue layer"
8 * Based on the DA8xx "glue layer" code.
9 * Copyright (c) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
19 #include <linux/dma-mapping.h>
20 #include <linux/usb/usb_phy_generic.h>
21 #include <linux/platform_data/usb-omap.h>
28 /* USB 2.0 OTG module registers */
57 /* USB interrupt register bits */
79 * am35x_musb_enable - enable interrupts
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Dmusb_dsps.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments DSPS platforms "glue layer"
7 * Based on the am35x "glue layer" code.
21 #include <linux/dma-mapping.h>
24 #include <linux/usb/usb_phy_generic.h>
25 #include <linux/platform_data/usb-omap.h>
32 #include <linux/usb/of.h>
101 * DSPS glue structure.
135 static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms) in dsps_mod_timer() argument
137 struct musb *musb = platform_get_drvdata(glue->musb); in dsps_mod_timer()
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Dmpfs.c1 // SPDX-License-Identifier: GPL-2.0
3 * PolarFire SoC (MPFS) MUSB Glue Layer
5 * Copyright (c) 2020-2022 Microchip Corporation. All rights reserved.
11 #include <linux/dma-mapping.h>
17 #include <linux/usb/usb_phy_generic.h>
57 spin_lock_irqsave(&musb->lock, flags); in mpfs_musb_interrupt()
59 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); in mpfs_musb_interrupt()
60 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); in mpfs_musb_interrupt()
61 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX); in mpfs_musb_interrupt()
63 if (musb->int_usb || musb->int_tx || musb->int_rx) { in mpfs_musb_interrupt()
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Dux500.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010 ST-Ericsson AB
16 #include <linux/usb/musb-ux500.h>
32 #define glue_to_musb(g) platform_get_drvdata(g->musb)
43 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); in ux500_musb_set_vbus()
46 if (musb->xceiv->otg->state == OTG_STATE_A_IDLE) { in ux500_musb_set_vbus()
49 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); in ux500_musb_set_vbus()
54 while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) { in ux500_musb_set_vbus()
57 dev_err(musb->controller, in ux500_musb_set_vbus()
64 musb->is_active = 1; in ux500_musb_set_vbus()
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Ddavinci.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005-2006 by Texas Instruments
18 #include <linux/dma-mapping.h>
19 #include <linux/usb/usb_phy_generic.h>
24 #include <asm/mach-types.h>
54 /* power everything up; start the on-chip PHY and its PLL */ in phy_on()
68 /* powerdown the on-chip PHY, its PLL, and the OTG block */ in phy_off()
81 tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK) in davinci_musb_enable()
83 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); in davinci_musb_enable()
85 tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK)) in davinci_musb_enable()
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/Linux-v6.1/drivers/usb/chipidea/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
12 Say Y here if your system has a dual role high speed USB
14 Dual-role switch (ID, OTG FSM, sysfs), Host-only, and
15 Peripheral-only.
37 tristate "Enable PCI glue driver" if EXPERT
43 tristate "Enable MSM hsusb glue driver" if EXPERT
47 tristate "Enable i.MX USB glue driver" if EXPERT
52 tristate "Enable generic USB2 glue driver" if EXPERT
56 tristate "Enable Tegra USB glue driver" if EXPERT
/Linux-v6.1/drivers/usb/dwc3/
Ddwc3-st.c1 // SPDX-License-Identifier: GPL-2.0+
3 * dwc3-st.c Support for dwc3 platform devices on ST Microelectronics platforms
5 * This is a small driver for the dwc3 to provide the glue logic
14 * Inspired by dwc3-omap.c and dwc3-exynos.c.
31 #include <linux/usb/of.h>
36 /* glue registers */
78 * struct st_dwc3 - dwc3-st driver private structure
80 * @glue_base: ioaddr for the glue registers
82 * @syscfg_reg_off: usb syscfg control offset
120 err = regmap_read(dwc3_data->regmap, dwc3_data->syscfg_reg_off, &val); in st_dwc3_drd_init()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0
5 depends on (USB || USB_GADGET) && HAS_DMA
10 USB controller based on the DesignWare USB3 IP Core.
26 default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
27 default USB_DWC3_HOST if (USB && !USB_GADGET)
28 default USB_DWC3_GADGET if (!USB && USB_GADGET)
32 depends on USB=y || USB=USB_DWC3
46 depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
54 comment "Platform Glue Driver Support"
78 tristate "PCIe-based Platforms"
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/Linux-v6.1/Documentation/driver-api/media/drivers/
Dpvrusb2.rst1 .. SPDX-License-Identifier: GPL-2.0
9 ----------
11 This driver is intended for the "Hauppauge WinTV PVR USB 2.0", which
12 is a USB 2.0 hosted TV Tuner. This driver is a work in progress.
13 Its history started with the reverse-engineering effort by Björn
29 1. Low level wire-protocol implementation with the device.
38 tear-down, arbitration, and interaction with high level
42 5. High level interfaces which glue the driver to various published
61 --------
70 --------------------------------------
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/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dsocionext,uniphier-usb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 controller doesn't include its own High-Speed PHY. This needs to specify
14 USB2 PHY instead of USB3 HS-PHY.
17 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
22 - socionext,uniphier-pro4-usb2-phy
23 - socionext,uniphier-ld11-usb2-phy
25 "#address-cells":
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/Linux-v6.1/arch/arm/boot/dts/
Duniphier-pro4.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "socionext,uniphier-pro4";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a9";
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/Linux-v6.1/Documentation/devicetree/bindings/reset/
Dsocionext,uniphier-glue-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/socionext,uniphier-glue-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier peripheral core reset in glue layer
10 Some peripheral core reset belongs to its own glue layer. Before using
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro4-usb3-reset
22 - socionext,uniphier-pro5-usb3-reset
23 - socionext,uniphier-pxs2-usb3-reset
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