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/Linux-v6.1/Documentation/devicetree/bindings/mmc/
Dcdns,sdhci.yaml49 cdns,phy-input-delay-sd-uhs-sdr12:
50 description: Value of the delay in the input path for SD UHS SDR12 timing
55 cdns,phy-input-delay-sd-uhs-sdr25:
56 description: Value of the delay in the input path for SD UHS SDR25 timing
61 cdns,phy-input-delay-sd-uhs-sdr50:
62 description: Value of the delay in the input path for SD UHS SDR50 timing
67 cdns,phy-input-delay-sd-uhs-ddr50:
68 description: Value of the delay in the input path for SD UHS DDR50 timing
Dsdhci-sprd.txt24 - pinctrl-1: should contain uhs mode pin control
35 - sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing.
36 - sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing.
60 sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>;
Dmmc-controller.yaml140 sd-uhs-sdr12:
143 SD UHS SDR12 speed is supported.
145 sd-uhs-sdr25:
148 SD UHS SDR25 speed is supported.
150 sd-uhs-sdr50:
153 SD UHS SDR50 speed is supported.
155 sd-uhs-sdr104:
158 SD UHS SDR104 speed is supported.
160 sd-uhs-ddr50:
163 SD UHS DDR50 speed is supported.
[all …]
Dsdhci-st.txt51 - sd-uhs-sdr50: To enable the SDR50 in the mmcss.
54 - sd-uhs-sdr104: To enable the SDR104 in the mmcss.
57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
107 sd-uhs-sdr50;
108 sd-uhs-sdr104;
109 sd-uhs-ddr50;
Dsocionext,uniphier-sd.yaml94 pinctrl-names = "default", "uhs";
104 sd-uhs-sdr12;
105 sd-uhs-sdr25;
106 sd-uhs-sdr50;
Dsdhci-am654.yaml81 description: Output tap delay for SD UHS SDR12 timing
87 description: Output tap delay for SD UHS SDR25 timing
93 description: Output tap delay for SD UHS SDR50 timing
99 description: Output tap delay for SD UHS SDR104 timing
105 description: Output tap delay for SD UHS DDR50 timing
151 description: Input tap delay for SD UHS SDR12 timing
157 description: Input tap delay for SD UHS SDR25 timing
Dbrcm,sdhci-brcmstb.yaml93 sd-uhs-sdr50;
94 sd-uhs-ddr50;
95 sd-uhs-sdr104;
/Linux-v6.1/arch/riscv/boot/dts/microchip/
Dmpfs-polarberry.dts75 sd-uhs-sdr12;
76 sd-uhs-sdr25;
77 sd-uhs-sdr50;
78 sd-uhs-sdr104;
Dmpfs-icicle-kit.dts117 sd-uhs-sdr12;
118 sd-uhs-sdr25;
119 sd-uhs-sdr50;
120 sd-uhs-sdr104;
Dmpfs-sev-kit.dts108 sd-uhs-sdr12;
109 sd-uhs-sdr25;
110 sd-uhs-sdr50;
111 sd-uhs-sdr104;
Dmpfs-m100pfsevp.dts124 sd-uhs-sdr12;
125 sd-uhs-sdr25;
126 sd-uhs-sdr50;
127 sd-uhs-sdr104;
/Linux-v6.1/arch/arm/boot/dts/
Drk3288-veyron-sdmmc.dtsi83 sd-uhs-sdr12;
84 sd-uhs-sdr25;
85 sd-uhs-sdr50;
86 sd-uhs-sdr104;
Dstih410-b2120.dts39 sd-uhs-sdr50;
40 sd-uhs-sdr104;
41 sd-uhs-ddr50;
Dstih418-b2199.dts92 sd-uhs-sdr50;
93 sd-uhs-sdr104;
94 sd-uhs-ddr50;
Drk3288-phycore-rdk.dts231 sd-uhs-sdr12;
232 sd-uhs-sdr25;
233 sd-uhs-sdr50;
234 sd-uhs-sdr104;
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dfsl-ls1012a-rdb.dts29 sd-uhs-sdr104;
30 sd-uhs-sdr50;
31 sd-uhs-sdr25;
32 sd-uhs-sdr12;
Dfsl-lx2160a-clearfog-itx.dtsi92 sd-uhs-sdr104;
93 sd-uhs-sdr50;
94 sd-uhs-sdr25;
95 sd-uhs-sdr12;
Dfsl-ls1046a-rdb.dts41 sd-uhs-sdr104;
42 sd-uhs-sdr50;
43 sd-uhs-sdr25;
44 sd-uhs-sdr12;
Dfsl-lx2160a-rdb.dts130 sd-uhs-sdr104;
131 sd-uhs-sdr50;
132 sd-uhs-sdr25;
133 sd-uhs-sdr12;
Dfsl-ls1028a-rdb.dts162 sd-uhs-sdr104;
163 sd-uhs-sdr50;
164 sd-uhs-sdr25;
165 sd-uhs-sdr12;
Dfsl-ls1028a-kontron-sl28.dts99 sd-uhs-sdr104;
100 sd-uhs-sdr50;
101 sd-uhs-sdr25;
102 sd-uhs-sdr12;
/Linux-v6.1/drivers/mmc/core/
Dhost.c248 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr12", in mmc_of_parse_clk_phase()
250 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr25", in mmc_of_parse_clk_phase()
252 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr50", in mmc_of_parse_clk_phase()
254 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr104", in mmc_of_parse_clk_phase()
256 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-ddr50", in mmc_of_parse_clk_phase()
363 if (device_property_read_bool(dev, "sd-uhs-sdr12")) in mmc_of_parse()
365 if (device_property_read_bool(dev, "sd-uhs-sdr25")) in mmc_of_parse()
367 if (device_property_read_bool(dev, "sd-uhs-sdr50")) in mmc_of_parse()
369 if (device_property_read_bool(dev, "sd-uhs-sdr104")) in mmc_of_parse()
371 if (device_property_read_bool(dev, "sd-uhs-ddr50")) in mmc_of_parse()
Ddebugfs.c130 str = "sd uhs SDR12"; in mmc_ios_show()
133 str = "sd uhs SDR25"; in mmc_ios_show()
136 str = "sd uhs SDR50"; in mmc_ios_show()
139 str = "sd uhs SDR104"; in mmc_ios_show()
142 str = "sd uhs DDR50"; in mmc_ios_show()
/Linux-v6.1/drivers/mmc/host/
Dsdhci-st.c257 unsigned int uhs) in sdhci_st_set_uhs_signaling() argument
266 switch (uhs) { in sdhci_st_set_uhs_signaling()
268 * Set V18_EN -- UHS modes do not work without this. in sdhci_st_set_uhs_signaling()
300 "(uhs %d)\n", uhs); in sdhci_st_set_uhs_signaling()
302 dev_dbg(mmc_dev(host->mmc), "uhs %d, ctrl_2 %04X\n", uhs, ctrl_2); in sdhci_st_set_uhs_signaling()
Dsdhci-pxav3.c240 static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) in pxav3_set_uhs_signaling() argument
247 * Set V18_EN -- UHS modes do not work without this. in pxav3_set_uhs_signaling()
254 switch (uhs) { in pxav3_set_uhs_signaling()
280 if (uhs == MMC_TIMING_UHS_SDR50 || in pxav3_set_uhs_signaling()
281 uhs == MMC_TIMING_UHS_DDR50) { in pxav3_set_uhs_signaling()
284 } else if (uhs == MMC_TIMING_MMC_HS) { in pxav3_set_uhs_signaling()
296 "%s uhs = %d, ctrl_2 = %04X\n", in pxav3_set_uhs_signaling()
297 __func__, uhs, ctrl_2); in pxav3_set_uhs_signaling()

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