| /Linux-v5.15/Documentation/devicetree/bindings/mmc/ |
| D | cdns,sdhci.yaml | 49 cdns,phy-input-delay-sd-uhs-sdr12:
50 description: Value of the delay in the input path for SD UHS SDR12 timing
55 cdns,phy-input-delay-sd-uhs-sdr25:
56 description: Value of the delay in the input path for SD UHS SDR25 timing
61 cdns,phy-input-delay-sd-uhs-sdr50:
62 description: Value of the delay in the input path for SD UHS SDR50 timing
67 cdns,phy-input-delay-sd-uhs-ddr50:
68 description: Value of the delay in the input path for SD UHS DDR50 timing
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| D | sdhci-sprd.txt | 24 - pinctrl-1: should contain uhs mode pin control
35 - sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing.
36 - sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing.
60 sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>;
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| D | sdhci-st.txt | 51 - sd-uhs-sdr50: To enable the SDR50 in the mmcss.
54 - sd-uhs-sdr104: To enable the SDR104 in the mmcss.
57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
107 sd-uhs-sdr50;
108 sd-uhs-sdr104;
109 sd-uhs-ddr50;
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| D | mmc-controller.yaml | 133 sd-uhs-sdr12:
136 SD UHS SDR12 speed is supported.
138 sd-uhs-sdr25:
141 SD UHS SDR25 speed is supported.
143 sd-uhs-sdr50:
146 SD UHS SDR50 speed is supported.
148 sd-uhs-sdr104:
151 SD UHS SDR104 speed is supported.
153 sd-uhs-ddr50:
156 SD UHS DDR50 speed is supported.
[all …]
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| D | brcm,sdhci-brcmstb.txt | 6 NOTE: The driver disables all UHS speed modes by default and depends
21 sd-uhs-sdr50;
22 sd-uhs-ddr50;
23 sd-uhs-sdr104;
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| D | sdhci-am654.yaml | 75 description: Output tap delay for SD UHS SDR12 timing
81 description: Output tap delay for SD UHS SDR25 timing
87 description: Output tap delay for SD UHS SDR50 timing
93 description: Output tap delay for SD UHS SDR104 timing
99 description: Output tap delay for SD UHS DDR50 timing
145 description: Input tap delay for SD UHS SDR12 timing
151 description: Input tap delay for SD UHS SDR25 timing
|
| D | socionext,uniphier-sd.yaml | 88 pinctrl-names = "default", "uhs";
98 sd-uhs-sdr12;
99 sd-uhs-sdr25;
100 sd-uhs-sdr50;
|
| /Linux-v5.15/arch/arm/boot/dts/ |
| D | imx6qdl-colibri-v1_1-uhs.dtsi | 40 sd-uhs-sdr12;
41 sd-uhs-sdr25;
42 sd-uhs-sdr50;
43 sd-uhs-sdr104;
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| D | rk3288-veyron-sdmmc.dtsi | 83 sd-uhs-sdr12;
84 sd-uhs-sdr25;
85 sd-uhs-sdr50;
86 sd-uhs-sdr104;
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| D | stih410-b2120.dts | 31 sd-uhs-sdr50;
32 sd-uhs-sdr104;
33 sd-uhs-ddr50;
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| D | imx6ull-colibri-eval-v3.dtsi | 173 sd-uhs-sdr12;
174 sd-uhs-sdr25;
175 sd-uhs-sdr50;
176 sd-uhs-sdr104;
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| D | stih418-b2199.dts | 81 sd-uhs-sdr50;
82 sd-uhs-sdr104;
83 sd-uhs-ddr50;
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| D | rk3288-phycore-rdk.dts | 231 sd-uhs-sdr12;
232 sd-uhs-sdr25;
233 sd-uhs-sdr50;
234 sd-uhs-sdr104;
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| D | imx6dl-colibri-v1_1-eval-v3.dts | 9 #include "imx6qdl-colibri-v1_1-uhs.dtsi"
26 * UHS-I support.
|
| /Linux-v5.15/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1012a-rdb.dts | 28 sd-uhs-sdr104;
29 sd-uhs-sdr50;
30 sd-uhs-sdr25;
31 sd-uhs-sdr12;
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| D | fsl-lx2160a-clearfog-itx.dtsi | 88 sd-uhs-sdr104;
89 sd-uhs-sdr50;
90 sd-uhs-sdr25;
91 sd-uhs-sdr12;
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| D | fsl-ls1046a-rdb.dts | 41 sd-uhs-sdr104;
42 sd-uhs-sdr50;
43 sd-uhs-sdr25;
44 sd-uhs-sdr12;
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| D | fsl-lx2160a-rdb.dts | 113 sd-uhs-sdr104;
114 sd-uhs-sdr50;
115 sd-uhs-sdr25;
116 sd-uhs-sdr12;
|
| D | fsl-ls1028a-rdb.dts | 106 sd-uhs-sdr104;
107 sd-uhs-sdr50;
108 sd-uhs-sdr25;
109 sd-uhs-sdr12;
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| D | fsl-ls1028a-kontron-sl28.dts | 102 sd-uhs-sdr104;
103 sd-uhs-sdr50;
104 sd-uhs-sdr25;
105 sd-uhs-sdr12;
|
| /Linux-v5.15/drivers/mmc/core/ |
| D | debugfs.c | 130 str = "sd uhs SDR12"; in mmc_ios_show()
133 str = "sd uhs SDR25"; in mmc_ios_show()
136 str = "sd uhs SDR50"; in mmc_ios_show()
139 str = "sd uhs SDR104"; in mmc_ios_show()
142 str = "sd uhs DDR50"; in mmc_ios_show()
|
| D | host.c | 239 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr12", in mmc_of_parse_clk_phase()
241 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr25", in mmc_of_parse_clk_phase()
243 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr50", in mmc_of_parse_clk_phase()
245 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr104", in mmc_of_parse_clk_phase()
247 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-ddr50", in mmc_of_parse_clk_phase()
354 if (device_property_read_bool(dev, "sd-uhs-sdr12")) in mmc_of_parse()
356 if (device_property_read_bool(dev, "sd-uhs-sdr25")) in mmc_of_parse()
358 if (device_property_read_bool(dev, "sd-uhs-sdr50")) in mmc_of_parse()
360 if (device_property_read_bool(dev, "sd-uhs-sdr104")) in mmc_of_parse()
362 if (device_property_read_bool(dev, "sd-uhs-ddr50")) in mmc_of_parse()
|
| /Linux-v5.15/drivers/mmc/host/ |
| D | sdhci-st.c | 257 unsigned int uhs) in sdhci_st_set_uhs_signaling() argument
266 switch (uhs) { in sdhci_st_set_uhs_signaling()
268 * Set V18_EN -- UHS modes do not work without this. in sdhci_st_set_uhs_signaling()
300 "(uhs %d)\n", uhs); in sdhci_st_set_uhs_signaling()
302 dev_dbg(mmc_dev(host->mmc), "uhs %d, ctrl_2 %04X\n", uhs, ctrl_2); in sdhci_st_set_uhs_signaling()
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| D | sdhci-pxav3.c | 240 static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) in pxav3_set_uhs_signaling() argument
247 * Set V18_EN -- UHS modes do not work without this. in pxav3_set_uhs_signaling()
254 switch (uhs) { in pxav3_set_uhs_signaling()
280 if (uhs == MMC_TIMING_UHS_SDR50 || in pxav3_set_uhs_signaling()
281 uhs == MMC_TIMING_UHS_DDR50) { in pxav3_set_uhs_signaling()
284 } else if (uhs == MMC_TIMING_MMC_HS) { in pxav3_set_uhs_signaling()
296 "%s uhs = %d, ctrl_2 = %04X\n", in pxav3_set_uhs_signaling()
297 __func__, uhs, ctrl_2); in pxav3_set_uhs_signaling()
|
| /Linux-v5.15/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxl-s905x-libretech-cc-v2.dts | 248 sd-uhs-sdr12;
249 sd-uhs-sdr25;
250 sd-uhs-sdr50;
251 sd-uhs-ddr50;
|
