/Linux-v6.6/Documentation/devicetree/bindings/mmc/ |
D | socionext,uniphier-sd.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/socionext,uniphier-sd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 16 - socionext,uniphier-sd-v2.91 17 - socionext,uniphier-sd-v3.1 18 - socionext,uniphier-sd-v3.1.1 32 dma-names: 33 const: rx-tx [all …]
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D | cdns,sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 15 - enum: 16 - amd,pensando-elba-sd4hc 17 - microchip,mpfs-sd4hc 18 - socionext,uniphier-sd4hc 19 - const: cdns,sd4hc 39 cdns,phy-input-delay-sd-highspeed: [all …]
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D | sdhci-sprd.txt | 1 * Spreadtrum SDHCI controller (sdhci-sprd) 7 and the properties used by the sdhci-sprd driver. 10 - compatible: Should contain "sprd,sdhci-r11". 11 - reg: physical base address of the controller and length. 12 - interrupts: Interrupts used by the SDHCI controller. 13 - clocks: Should contain phandle for the clock feeding the SDHCI controller 14 - clock-names: Should contain the following: 15 "sdio" - SDIO source clock (required) 16 "enable" - gate clock which used for enabling/disabling the device (required) 17 "2x_enable" - gate clock controlling the device for some special platforms (optional) [all …]
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D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 25 "#address-cells": 30 "#size-cells": 37 broken-cd: 42 cd-gpios: 47 non-removable: [all …]
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D | sdhci-st.txt | 1 * STMicroelectronics sdhci-st MMC/SD controller 5 used by the sdhci-st driver. 8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407" 13 - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory) 14 See: Documentation/devicetree/bindings/resource-names.txt 15 - clocks: Phandle to the clock. 16 See: Documentation/devicetree/bindings/clock/clock-bindings.txt 18 - interrupts: One mmc interrupt should be described here. 19 - interrupt-names: Should be "mmcirq". 21 - pinctrl-names: A pinctrl state names "default" must be defined. [all …]
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D | sdhci-am654.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Ulf Hansson <ulf.hansson@linaro.org> 14 - $ref: sdhci-common.yaml# 19 - enum: 20 - ti,am62-sdhci 21 - ti,am64-sdhci-4bit [all …]
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D | brcm,sdhci-brcmstb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Al Cooper <alcooperx@gmail.com> 11 - Florian Fainelli <f.fainelli@gmail.com> 16 - items: 17 - enum: 18 - brcm,bcm7216-sdhci 19 - const: brcm,bcm7445-sdhci [all …]
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/Linux-v6.6/arch/arm64/boot/dts/sprd/ |
D | ums512-1h10.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Unisoc UMS512-1h10 boards DTS file 8 /dts-v1/; 13 model = "Unisoc UMS512-1H10 Board"; 15 compatible = "sprd,ums512-1h10", "sprd,ums512"; 28 stdout-path = "serial1:115200n8"; 42 bus-width = <4>; 43 no-sdio; 44 no-mmc; 45 sprd,phy-delay-sd-uhs-sdr104 = <0x7f 0x73 0x72 0x72>; [all …]
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/Linux-v6.6/arch/riscv/boot/dts/microchip/ |
D | mpfs-polarberry.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2020-2022 Microchip Technology Inc */ 4 /dts-v1/; 7 #include "mpfs-polarberry-fabric.dtsi" 22 stdout-path = "serial0:115200n8"; 26 timebase-frequency = <MTIMER_FREQ>; 45 phy-mode = "sgmii"; 46 phy-handle = <&phy0>; 51 phy-mode = "sgmii"; 52 phy-handle = <&phy1>; [all …]
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D | mpfs-sev-kit.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 /dts-v1/; 7 #include "mpfs-sev-kit-fabric.dtsi" 13 #address-cells = <2>; 14 #size-cells = <2>; 15 model = "Microchip PolarFire-SoC SEV Kit"; 16 compatible = "microchip,mpfs-sev-kit", "microchip,mpfs"; 28 stdout-path = "serial1:115200n8"; 32 timebase-frequency = <MTIMER_FREQ>; 35 reserved-memory { [all …]
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D | mpfs-m100pfsevp.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Original all-in-one devicetree: 4 * Copyright (C) 2021-2022 - Wolfgang Grandegger <wg@aries-embedded.de> 6 * Copyright (C) 2022 - Conor Dooley <conor.dooley@microchip.com> 8 /dts-v1/; 11 #include "mpfs-m100pfs-fabric.dtsi" 33 stdout-path = "serial1:115200n8"; 37 timebase-frequency = <MTIMER_FREQ>; 70 pmic-irq-hog { 71 gpio-hog; [all …]
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D | mpfs-icicle-kit.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2020-2021 Microchip Technology Inc */ 4 /dts-v1/; 7 #include "mpfs-icicle-kit-fabric.dtsi" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/leds/common.h> 15 model = "Microchip PolarFire-SoC Icicle Kit"; 16 compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit", 29 stdout-path = "serial1:115200n8"; 33 timebase-frequency = <RTCCLK_FREQ>; [all …]
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/Linux-v6.6/arch/arm64/boot/dts/freescale/ |
D | fsl-ls1012a-rdb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "fsl-ls1012a.dtsi" 15 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a"; 29 sd-uhs-sdr104; 30 sd-uhs-sdr50; 31 sd-uhs-sdr25; 32 sd-uhs-sdr12; 37 mmc-hs200-1_8v; [all …]
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D | fsl-lx2160a-clearfog-itx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 10 #include "fsl-lx2160a-cex7.dtsi" 11 #include <dt-bindings/input/linux-event-codes.h> 20 stdout-path = "serial0:115200n8"; 23 gpio-keys { 24 compatible = "gpio-keys"; 28 linux,can-disable; 34 sfp0: sfp-0 { 36 i2c-bus = <&sfp0_i2c>; [all …]
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D | fsl-ls1046a-rdb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-1046A family SoC. 6 * Copyright 2019-2020 NXP 11 /dts-v1/; 13 #include "fsl-ls1046a.dtsi" 17 compatible = "fsl,ls1046a-rdb", "fsl,ls1046a"; 27 stdout-path = "serial0:115200n8"; 40 mmc-hs200-1_8v; 41 sd-uhs-sdr104; 42 sd-uhs-sdr50; [all …]
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D | fsl-lx2160a-rdb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 // Copyright 2018-2020 NXP 7 /dts-v1/; 9 #include "fsl-lx2160a.dtsi" 13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a"; 23 stdout-path = "serial0:115200n8"; 26 sb_3v3: regulator-sb3v3 { 27 compatible = "regulator-fixed"; 28 regulator-name = "MC34717-3.3VSB"; 29 regulator-min-microvolt = <3300000>; [all …]
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/Linux-v6.6/arch/arm/boot/dts/rockchip/ |
D | rk3288-veyron-sdmmc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 15 sdcard-supply = <&vccio_sd>; 24 sdmmc_bus4: sdmmc-bus4 { 31 sdmmc_clk: sdmmc-clk { 35 sdmmc_cmd: sdmmc-cmd { 45 sdmmc_cd_disabled: sdmmc-cd-disabled { 50 sdmmc_cd_pin: sdmmc-cd-pin { 57 vcc9-supply = <&vcc_5v>; 61 regulator-name = "vccio_sd"; 62 regulator-min-microvolt = <1800000>; [all …]
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D | rv1126-edgeble-neu2-io.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include "rv1126-edgeble-neu2.dtsi" 13 compatible = "edgeble,neural-compute-module-2-io", 14 "edgeble,neural-compute-module-2", "rockchip,rv1126"; 21 stdout-path = "serial2:1500000n8"; 24 vcc12v_dcin: vcc12v-dcin-regulator { 25 compatible = "regulator-fixed"; 26 regulator-name = "vcc12v_dcin"; 27 regulator-always-on; [all …]
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D | rk3288-phycore-rdk.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device tree file for Phytec PCM-947 carrier board 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/leds-pca9532.h> 12 #include "rk3288-phycore-som.dtsi" 15 model = "Phytec RK3288 PCM-947"; 16 compatible = "phytec,rk3288-pcm-947", "phytec,rk3288-phycore-som", "rockchip,rk3288"; 18 user_buttons: user-buttons { 19 compatible = "gpio-keys"; [all …]
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/Linux-v6.6/arch/arm/boot/dts/st/ |
D | stih410-b2120.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include "stihxxx-b2120.dtsi" 11 compatible = "st,stih410-b2120", "st,stih410"; 14 stdout-path = &sbc_serial0; 38 max-frequency = <200000000>; 39 sd-uhs-sdr50; 40 sd-uhs-sdr104; 41 sd-uhs-ddr50; 60 sti-display-subsystem@0 { [all …]
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D | stih418-b2199.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 11 compatible = "st,stih418-b2199", "st,stih418"; 14 stdout-path = &sbc_serial0; 28 compatible = "gpio-leds"; 29 led-red { 32 linux,default-trigger = "heartbeat"; 34 led-green { 36 default-state = "off"; [all …]
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/Linux-v6.6/drivers/mmc/host/ |
D | sdhci-st.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 * Based on sdhci-cns3xxx.c 18 #include "sdhci-pltfm.h" 88 #define ST_TOP_MMC_DLY_FIX_OFF(x) (x - 0x8) 102 /* register to provide the phase-shift value for DLL */ 119 * DLL procedure has finished before switching to ultra-speed modes. 139 * flashSS sub-system which needs to be configured to be compliant to eMMC 4.5 145 struct mmc_host *mhost = host->mmc; in st_mmcss_cconfig() 148 if (!of_device_is_compatible(np, "st,sdhci-stih407")) in st_mmcss_cconfig() 157 host->ioaddr + ST_MMC_CCONFIG_REG_1); in st_mmcss_cconfig() [all …]
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D | sdhci-pxav3.c | 1 // SPDX-License-Identifier: GPL-2.0-only 28 #include "sdhci-pltfm.h" 80 dev_err(&pdev->dev, "no mbus dram info\n"); in mv_conf_mbus_windows() 81 return -EINVAL; in mv_conf_mbus_windows() 86 dev_err(&pdev->dev, "cannot get mbus registers\n"); in mv_conf_mbus_windows() 87 return -EINVAL; in mv_conf_mbus_windows() 90 regs = ioremap(res->start, resource_size(res)); in mv_conf_mbus_windows() 92 dev_err(&pdev->dev, "cannot map mbus registers\n"); in mv_conf_mbus_windows() 93 return -ENOMEM; in mv_conf_mbus_windows() 101 for (i = 0; i < dram->num_cs; i++) { in mv_conf_mbus_windows() [all …]
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/Linux-v6.6/drivers/mmc/core/ |
D | host.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (C) 2007-2008 Pierre Ossman 25 #include <linux/mmc/slot-gpio.h> 30 #include "slot-gpio.h" 47 if (!host->bus_ops) in mmc_host_class_prepare() 51 if (host->bus_ops->pre_suspend) in mmc_host_class_prepare() 52 return host->bus_ops->pre_suspend(host); in mmc_host_class_prepare() 77 wakeup_source_unregister(host->ws); in mmc_host_classdev_release() 78 if (of_alias_get_id(host->parent->of_node, "mmc") < 0) in mmc_host_classdev_release() 79 ida_simple_remove(&mmc_host_ida, host->index); in mmc_host_classdev_release() [all …]
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D | debugfs.c | 1 // SPDX-License-Identifier: GPL-2.0-only 14 #include <linux/fault-inject.h> 55 struct mmc_host *host = s->private; in mmc_ios_show() 56 struct mmc_ios *ios = &host->ios; in mmc_ios_show() 59 seq_printf(s, "clock:\t\t%u Hz\n", ios->clock); in mmc_ios_show() 60 if (host->actual_clock) in mmc_ios_show() 61 seq_printf(s, "actual clock:\t%u Hz\n", host->actual_clock); in mmc_ios_show() 62 seq_printf(s, "vdd:\t\t%u ", ios->vdd); in mmc_ios_show() 63 if ((1 << ios->vdd) & MMC_VDD_165_195) in mmc_ios_show() 64 seq_printf(s, "(1.65 - 1.95 V)\n"); in mmc_ios_show() [all …]
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