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/Linux-v6.1/Documentation/admin-guide/pm/
Dintel_pstate.rst1 .. SPDX-License-Identifier: GPL-2.0
22 Documentation/admin-guide/pm/cpufreq.rst if you have not done that yet.]
24 For the processors supported by ``intel_pstate``, the P-state concept is broader
27 information about that). For this reason, the representation of P-states used
32 ``intel_pstate`` maps its internal representation of P-states to frequencies too
38 Since the hardware P-state selection interface used by ``intel_pstate`` is
43 time the corresponding CPU is taken offline and need to be re-initialized when
47 only way to pass early-configuration-time parameters to it is via the kernel
58 active mode, it uses its own internal performance scaling governor algorithm or
60 mode it responds to requests made by a generic ``CPUFreq`` governor implementing
[all …]
Dintel-speed-select.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
49 The top-level help describes arguments and features. Notice that there is a
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/Linux-v6.1/Documentation/ABI/testing/
Dsysfs-platform-msi-laptop1 What: /sys/devices/platform/msi-laptop-pf/lcd_level
8 What: /sys/devices/platform/msi-laptop-pf/auto_brightness
17 What: /sys/devices/platform/msi-laptop-pf/wlan
24 What: /sys/devices/platform/msi-laptop-pf/bluetooth
33 What: /sys/devices/platform/msi-laptop-pf/touchpad
41 What: /sys/devices/platform/msi-laptop-pf/turbo_mode
46 Contains either 0 or 1 and indicates if turbo mode is turned
47 on. In turbo mode power LED is orange and processor is
48 overclocked. Turbo mode is available only if charging. It is
49 only possible to toggle turbo mode state by pressing Fn+F10,
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/Linux-v6.1/arch/arm/boot/dts/
Dmstar-infinity3.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include "mstar-infinity.dtsi"
10 opp-1008000000 {
11 opp-hz = /bits/ 64 <1008000000>;
12 opp-microvolt = <1000000>;
13 clock-latency-ns = <300000>;
17 opp-108000000 {
18 opp-hz = /bits/ 64 <1080000000>;
19 opp-microvolt = <1000000>;
20 clock-latency-ns = <300000>;
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/Linux-v6.1/include/uapi/misc/
Dxilinx_sdfec.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Xilinx SD-FEC
26 (XSDFEC_LDPC_SC_TABLE_ADDR_HIGH - XSDFEC_LDPC_SC_TABLE_ADDR_BASE)
28 (XSDFEC_LDPC_LA_TABLE_ADDR_HIGH - XSDFEC_LDPC_LA_TABLE_ADDR_BASE)
30 (XSDFEC_LDPC_QC_TABLE_ADDR_HIGH - XSDFEC_LDPC_QC_TABLE_ADDR_BASE)
33 * enum xsdfec_code - Code Type.
34 * @XSDFEC_TURBO_CODE: Driver is configured for Turbo mode.
35 * @XSDFEC_LDPC_CODE: Driver is configured for LDPC mode.
37 * This enum is used to indicate the mode of the driver. The mode is determined
38 * by checking which codes are set in the driver. Note that the mode cannot be
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/Linux-v6.1/tools/power/x86/x86_energy_perf_policy/
Dx86_energy_perf_policy.81 .\" This page Copyright (C) 2010 - 2015 Len Brown <len.brown@intel.com>
5 x86_energy_perf_policy \- Manage Energy vs. Performance Policy via x86 Model Specific Registers
10 .RB "scope: \-\-cpu\ cpu-list | \-\-pkg\ pkg-list"
12 .RB "cpu-list, pkg-list: # | #,# | #-# | all"
14 .RB "field: \-\-all | \-\-epb | \-\-hwp-epp | \-\-hwp-min | \-\-hwp-max | \-\-hwp-desired"
16 .RB "other: (\-\-force | \-\-hwp-enable | \-\-turbo-enable) value)"
18 .RB "value: # | default | performance | balance-performance | balance-power | power"
21 displays and updates energy-performance policy settings specific to
23 updates, no matter if the Linux cpufreq sub-system is enabled or not.
27 such as how aggressively the hardware enters and exits CPU idle states (C-states)
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/Linux-v6.1/drivers/platform/x86/
Dintel_ips.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2009-2010 Intel Corporation
10 * Some Intel Ibex Peak based platforms support so-called "intelligent
16 * primary purpose is to safely allow CPU and GPU turbo modes to be enabled
17 * by tracking power and thermal budget; secondarily it can boost turbo
34 * - dual MCP configs
37 * - handle CPU hotplug
38 * - provide turbo enable/disable api
41 * - CDI 403777, 403778 - Auburndale EDS vol 1 & 2
42 * - CDI 401376 - Ibex Peak EDS
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/Linux-v6.1/arch/x86/kernel/
Ditmt.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * itmt.c: Support Intel Turbo Boost Max Technology 3.0
8 * On platforms supporting Intel Turbo Boost Max Technology 3.0, (ITMT),
9 * the maximum turbo frequencies of some cores in a CPU package may be
12 * to run tasks on the CPUs with higher max turbo frequencies.
34 * of higher turbo frequency for cpus supporting Intel Turbo Boost Max
51 return -EINVAL; in sched_itmt_update_handler()
72 .mode = 0644,
83 .mode = 0555,
92 * sched_set_itmt_support() - Indicate platform supports ITMT
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/Linux-v6.1/tools/power/x86/intel-speed-select/
Disst-config.c1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Speed Select -- Enumerate and control features
52 static int current_clos = -1;
53 static int clos_epp = -1;
54 static int clos_prop_prio = -1;
55 static int clos_min = -1;
56 static int clos_max = -1;
57 static int clos_desired = -1;
139 /* only three CascadeLake-N models are supported */ in update_cpu_model()
148 err(-1, "cannot open /proc/cpuinfo\n"); in update_cpu_model()
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/Linux-v6.1/drivers/net/wireless/ath/ath5k/
Dreset.c2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
4 * Copyright (c) 2007-2008 Luis Rodriguez <mcgrof@winlab.rutgers.edu>
5 * Copyright (c) 2007-2008 Pavel Roskin <proski@gnu.org>
6 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
30 #include <linux/pci.h> /* To determine if a card is pci-e */
52 * ath5k_hw_register_timeout() - Poll a register for a flag/field change
64 * Returns -EAGAIN if we exceeded AR5K_TUNE_REGISTER_TIMEOUT * 15us or 0
73 for (i = AR5K_TUNE_REGISTER_TIMEOUT; i > 0; i--) { in ath5k_hw_register_timeout()
82 return (i <= 0) ? -EAGAIN : 0; in ath5k_hw_register_timeout()
[all …]
Dath5k.h2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2007 Nick Kossifidis <mickflemm@gmail.com>
62 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV7 0x0057 /* AR5312 WMAC (AP30-040) */
63 #define PCI_DEVICE_ID_ATHEROS_AR5312_REV8 0x0058 /* AR5312 WMAC (AP43-030) */
70 #define PCI_DEVICE_ID_ATHEROS_AR2413 0x001a /* AR2413 (Griffin-lite) */
72 #define PCI_DEVICE_ID_ATHEROS_AR5424 0x001c /* AR5424 (Condor PCI-E) */
189 #define AR5K_TUNE_NOISE_FLOOR -72
190 #define AR5K_TUNE_CCA_MAX_GOOD_VALUE -95
236 /* Preamble time for 40MHz (turbo) operation (min ?) */
247 /* Tx latency for 40MHz (turbo) operation (min ?) */
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/Linux-v6.1/drivers/clk/pxa/
Dclk-pxa27x.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Heavily inspired from former arch/arm/mach-pxa/clock.c.
9 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/pxa-clock.h>
17 #include "clk-pxa.h"
18 #include "clk-pxa2xx.h"
66 return (interval - 31) / 32; in mdrefr_dri()
70 * Get the clock frequency as reflected by CCSR and the turbo flag.
90 pr_info("Run Mode clock: %ld.%02ldMHz\n", in pxa27x_get_clk_frequency_khz()
92 pr_info("Turbo Mode clock: %ld.%02ldMHz\n", in pxa27x_get_clk_frequency_khz()
[all …]
Dclk-pxa3xx.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Heavily inspired from former arch/arm/mach-pxa/pxa3xx.c
9 * For non-devicetree platforms. Once pxa is fully converted to devicetree, this
14 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/pxa-clock.h>
22 #include "clk-pxa.h"
37 #define ACCR_D0CS (1 << 26) /* D0 Mode Clock Select */
38 #define ACCR_PCCE (1 << 11) /* Power Mode Change Clock Enable */
44 #define ACCR_HSS_MASK (0x3 << 14) /* System Bus-Clock Frequency Select */
46 #define ACCR_XN_MASK (0x7 << 8) /* Core PLL Turbo-Mode-to-Run-Mode Ratio */
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Dclk-pxa25x.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Heavily inspired from former arch/arm/mach-pxa/pxa25x.c.
9 * For non-devicetree platforms. Once pxa is fully converted to devicetree, this
12 #include <linux/clk-provider.h>
19 #include <dt-bindings/clock/pxa-clock.h>
20 #include "clk-pxa.h"
21 #include "clk-pxa2xx.h"
47 /* Memory Frequency to Run Mode Frequency Multiplier (M) */
50 /* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
66 * Get the clock frequency as reflected by CCCR and the turbo flag.
[all …]
/Linux-v6.1/drivers/platform/x86/amd/pmf/
Dpmf.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Author: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
47 /* Fan Index for Auto Mode */
104 u16 core_temp[8]; /* in centi-Celsius */
106 u16 l3_temp; /* in centi-Celsius */
107 u16 gfx_temp; /* in centi-Celsius */
108 u16 soc_temp; /* in centi-Celsius */
121 u16 skin_temp; /* in centi-Celsius */
210 /* Auto Mode Layer */
212 AUTO_TRANSITION_TO_PERFORMANCE, /* Any other mode to Performance Mode */
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/icelakex/
Dother.json3 …ore cycles where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo …
9 …s running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX…
15 …Core cycles where the core was running in a manner where Turbo may be clipped to the AVX2 turbo sc…
21 … running with power-delivery for license level 1. This includes high current AVX 256-bit instruct…
27 …ore cycles where the core was running in a manner where Turbo may be clipped to the AVX512 turbo s…
33 … running with power-delivery for license level 2 (introduced in Skylake Server microarchtecture). …
138 …d by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only …
149 … on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
182 …d by DRAM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only …
193 …ed by PMM attached to this socket, unless in Sub NUMA Cluster(SNC) Mode. In SNC Mode counts only …
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/Linux-v6.1/arch/arm/mach-pxa/
Dsleep.S2 * Low-level PXA250/210 sleep/wakeUp support
17 #include "pxa2xx-regs.h"
28 * pxa3xx_finish_suspend() - forces CPU into sleep state (S2D3C4)
31 mov r0, #0x06 @ S2D3C4 mode
49 @ prepare value for sleep mode
50 mov r1, r0 @ sleep mode
59 @ enable SDRAM self-refresh mode
62 @ set SDCLKx divide-by-2 bits (this is part of a workaround for Errata 50)
90 @ prepare value for sleep mode
91 mov r1, r0 @ sleep mode
[all …]
/Linux-v6.1/drivers/cpufreq/
Dpxa2xx-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * 31-Jul-2002 : Initial version [FB]
7 * 29-Jan-2003 : added PXA255 support [FB]
8 * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
61 /* CPU MEMBUS run turbo PXbus SDRAM */
62 { 99500, -1, -1}, /* 99, 99, 50, 50 */
63 {132700, -1, -1}, /* 133, 133, 66, 66 */
64 {199100, -1, -1}, /* 199, 199, 99, 99 */
65 {265400, -1, -1}, /* 265, 265, 133, 66 */
66 {331800, -1, -1}, /* 331, 331, 166, 83 */
[all …]
Dintel_pstate.c1 // SPDX-License-Identifier: GPL-2.0-only
35 #include <asm/intel-family.h>
53 #define ONE_EIGHTH_FP ((int64_t)1 << (FRAC_BITS - 3))
75 mask = (1 << FRAC_BITS) - 1; in ceiling_fp()
92 * struct sample - Store performance sample
119 * struct pstate_data - Store P state data
126 * @perf_ctl_scaling: PERF_CTL P-state to frequency scaling factor
128 * @turbo_pstate: Max Turbo P state possible for this platform
149 * struct vid_data - Stores voltage information data
153 * @turbo: VID data for turbo P state
[all …]
/Linux-v6.1/tools/power/x86/turbostat/
Dturbostat.83 turbostat \- Report processor frequency and idle statistics
12 .RB [ "\--interval seconds" ]
15 idle power-state statistics, temperature and power on X86 processors.
19 in one-shot upon its completion.
22 The 5-second interval can be changed using the --interval option.
26 Options can be specified with a single or double '-', and only as much of the option
27 name as necessary to disambiguate it from others is necessary. Note that options are case-sensitiv…
29 \fB--add attributes\fP add column with counter having specified 'attributes'. The 'location' attri…
41 MSRs are read as 64-bits, u32 truncates the displayed value to 32-bits.
51 Any string that does not match a key-word above is used
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/Linux-v6.1/arch/x86/math-emu/
DREADME1 +---------------------------------------------------------------------------+
2 | wm-FPU-emu an FPU emulator for 80386 and 80486SX microprocessors. |
6 | Australia. E-mail billm@melbpc.org.au |
21 +---------------------------------------------------------------------------+
25 wm-FPU-emu is an FPU emulator for Linux. It is derived from wm-emu387
27 msdos); wm-emu387 was in turn based upon emu387 which was written by
31 My target FPU for wm-FPU-emu is that described in the Intel486
40 wm-FPU-emu does not implement all of the behaviour of the 80486 FPU,
52 --Bill Metzenthen
56 ----------------------- Internals of wm-FPU-emu -----------------------
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/Linux-v6.1/Documentation/devicetree/bindings/opp/
Dopp-v2-base.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-base.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 Devices work at voltage-current-frequency combinations and some implementations
25 pattern: '^opp-table(-[a-z0-9]+)?$'
27 opp-shared:
36 '^opp(-?[0-9]+)*$':
39 One or more OPP nodes describing voltage-current-frequency combinations.
[all …]
Dopp-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2
22 - |
24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states
28 #address-cells = <1>;
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/Linux-v6.1/arch/arm64/boot/dts/renesas/
Dr8a779m1.dtsi1 // SPDX-License-Identifier: (GPL-2.0 or MIT)
3 * Device Tree Source for the R-Car H3e-2G (R8A779M1) SoC
15 opp-2000000000 {
16 opp-hz = /bits/ 64 <2000000000>;
17 opp-microvolt = <960000>;
18 clock-latency-ns = <300000>;
19 turbo-mode;
Dr8a779m3.dtsi1 // SPDX-License-Identifier: (GPL-2.0 or MIT)
3 * Device Tree Source for the R-Car M3e-2G (R8A779M3) SoC
15 opp-2000000000 {
16 opp-hz = /bits/ 64 <2000000000>;
17 opp-microvolt = <960000>;
18 clock-latency-ns = <300000>;
19 turbo-mode;

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