Searched +full:tmu +full:- +full:range (Results 1 – 25 of 30) sorted by relevance
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/Linux-v6.6/Documentation/devicetree/bindings/thermal/ |
D | qoriq-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/qoriq-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs 10 - Anson Huang <Anson.Huang@nxp.com> 15 The version of the device is determined by the TMU IP Block Revision 19 ---------- ----- 22 - fsl,qoriq-tmu 23 - fsl,imx8mq-tmu [all …]
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/Linux-v6.6/drivers/thermal/ |
D | qoriq_thermal.c | 1 // SPDX-License-Identifier: GPL-2.0 54 #define REGS_V2_TMSAR(n) (0x304 + 16 * (n)) /* TMU monitoring 57 #define REGS_TTRnCR(n) (0xf10 + 4 * (n)) /* Temperature Range n 81 return container_of(s, struct qoriq_tmu_data, sensor[s->id]); in qoriq_sensor_to_data() 92 * For TMU Rev1: in tmu_get_temp() 97 * within sensor range. TEMP is an 8 bit value representing in tmu_get_temp() 100 * For TMU Rev2: in tmu_get_temp() 105 * within sensor range. TEMP is an 9 bit value representing in tmu_get_temp() 109 regmap_read(qdata->regmap, REGS_TMR, &val); in tmu_get_temp() 111 return -EAGAIN; in tmu_get_temp() [all …]
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D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 37 int "Emergency poweroff delay in milli-seconds" 144 bool "Fair-share thermal governor" 146 Enable this to manage platform thermals using fair-share governor. 240 memory-mapped reads to get the temperature. Any HW/System that 241 allows temperature reading by a single memory-mapped reading, be it 284 Support for Thermal Monitoring Unit (TMU) found on Freescale i.MX8MM SoC. 295 - AM654 315 Support for Thermal Monitoring Unit (TMU) found on QorIQ platforms. 341 module will be called sun8i-thermal. [all …]
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/Linux-v6.6/arch/powerpc/boot/dts/fsl/ |
D | t1023si-post.dtsi | 35 #include <dt-bindings/thermal/thermal.h> 38 compatible = "fsl,bman-fbpr"; 39 alloc-ranges = <0 0 0x10000 0>; 43 compatible = "fsl,qman-fqd"; 44 alloc-ranges = <0 0 0x10000 0>; 48 compatible = "fsl,qman-pfdr"; 49 alloc-ranges = <0 0 0x10000 0>; 53 #address-cells = <2>; 54 #size-cells = <1>; 55 compatible = "fsl,ifc", "simple-bus"; [all …]
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D | t1040si-post.dtsi | 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc. 35 #include <dt-bindings/thermal/thermal.h> 38 compatible = "fsl,bman-fbpr"; 39 alloc-ranges = <0 0 0x10000 0>; 43 compatible = "fsl,qman-fqd"; 44 alloc-ranges = <0 0 0x10000 0>; 48 compatible = "fsl,qman-pfdr"; 49 alloc-ranges = <0 0 0x10000 0>; 53 #address-cells = <2>; 54 #size-cells = <1>; [all …]
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/Linux-v6.6/arch/arm64/boot/dts/freescale/ |
D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1046A family SoC. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 37 #address-cells = <1>; [all …]
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D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2080A family SoC. 6 * Copyright 2017-2020 NXP 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 32 #address-cells = <1>; [all …]
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D | fsl-ls1043a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1043A family SoC. 5 * Copyright 2014-2015 Freescale Semiconductor, Inc. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/thermal/thermal.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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D | fsl-ls1012a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1012A family SoC. 6 * Copyright 2019-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 23 rtic-a = &rtic_a; [all …]
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D | fsl-lx2160a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 // Device Tree Include file for Layerscape-LX2160A family SoC. 5 // Copyright 2018-2020 NXP 7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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D | fsl-ls1088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1088A family SoC. 5 * Copyright 2017-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 26 #address-cells = <1>; [all …]
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D | fsl-ls1028a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1028A family SoC. 5 * Copyright 2018-2020 NXP 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 22 #address-cells = <1>; [all …]
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D | imx93.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx93-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/fsl,imx93-power.h> 11 #include <dt-bindings/thermal/thermal.h> 13 #include "imx93-pinfunc.h" 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; [all …]
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D | imx8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> 7 #include <dt-bindings/clock/imx8mq-clock.h> 8 #include <dt-bindings/power/imx8mq-power.h> 9 #include <dt-bindings/reset/imx8mq-reset.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include "dt-bindings/input/input.h" 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interconnect/imx8mq.h> [all …]
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/Linux-v6.6/drivers/thermal/samsung/ |
D | exynos_tmu.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * exynos_tmu.c - Samsung Exynos TMU (Thermal Management Unit) 25 #include <dt-bindings/thermal/thermal_exynos.h> 139 * struct exynos_tmu_data : A structure to hold the private data of the TMU 141 * @id: identifier of the one instance of the TMU controller. 142 * @base: base address of the single instance of the TMU controller. 143 * @base_second: base address of the common registers of the TMU controller. 144 * @irq: irq number of the TMU controller. 150 * @sclk: pointer to the clock structure for accessing the tmu special clk. 157 * @gain: gain of amplifier in the positive-TC generator block [all …]
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/Linux-v6.6/arch/arm/boot/dts/nxp/ls/ |
D | ls1021a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 12 interrupt-parent = <&gic>; 30 #address-cells = <1>; 31 #size-cells = <0>; 34 compatible = "arm,cortex-a7"; [all …]
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/Linux-v6.6/drivers/clocksource/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST 64 Enables the support for the TI dual-mode timer driver. 180 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture, 203 32-bit free running decrementing counters. 238 bool "Integrator-AP timer driver" if COMPILE_TEST 241 Enables support for the Integrator-AP timer. 266 available on many OMAP-like platforms. 285 bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST 289 These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores [all …]
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/Linux-v6.6/arch/arm64/boot/dts/renesas/ |
D | r8a77980.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car V3H (R8A77980) SoC 9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/power/r8a77980-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 19 /* External CAN clock - to be overridden by boards that provide it */ 21 compatible = "fixed-clock"; [all …]
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D | r8a774c0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a774c0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <0>; [all …]
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D | r8a77990.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a77990-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; [all …]
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D | r8a77961.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 8 #include <dt-bindings/clock/r8a77961-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a77961-sysc.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; [all …]
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D | r8a77965.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/power/r8a77965-sysc.h> 21 #address-cells = <2>; 22 #size-cells = <2>; 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; [all …]
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D | r8a774a1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h> 11 #include <dt-bindings/power/r8a774a1-sysc.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; [all …]
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D | r8a774b1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h> 11 #include <dt-bindings/power/r8a774b1-sysc.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; [all …]
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/Linux-v6.6/arch/arm64/boot/dts/exynos/ |
D | exynos5433.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 16 #include <dt-bindings/clock/exynos5433.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 21 #address-cells = <2>; 22 #size-cells = <2>; 24 interrupt-parent = <&gic>; 26 arm-a53-pmu { 27 compatible = "arm,cortex-a53-pmu"; 32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 35 arm-a57-pmu { [all …]
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