Searched +full:timing +full:- +full:667000000 (Results 1 – 5 of 5) sorted by relevance
/Linux-v5.10/Documentation/devicetree/bindings/memory-controllers/ |
D | nvidia,tegra30-mc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra30-mc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Osipenko <digetx@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 - Thierry Reding <thierry.reding@gmail.com> 39 const: nvidia,tegra30-mc 47 clock-names: 49 - const: mc [all …]
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D | nvidia,tegra30-emc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra30-emc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Osipenko <digetx@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 - Thierry Reding <thierry.reding@gmail.com> 15 The EMC interfaces with the off-chip SDRAM to service the request stream 16 sent from Memory Controller. The EMC also has various performance-affecting 23 const: nvidia,tegra30-emc [all …]
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/Linux-v5.10/arch/arm/boot/dts/ |
D | tegra30-asus-nexus7-tilapia-memory-timings.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "tegra30-asus-nexus7-grouper-memory-timings.dtsi" 12 memory-controller@7000f400 { 13 emc-timings-0 { 14 timing-667000000 { 15 clock-frequency = <667000000>; 17 nvidia,emc-auto-cal-interval = <0x001fffff>; 18 nvidia,emc-mode-1 = <0x80100002>; 19 nvidia,emc-mode-2 = <0x80200018>; 20 nvidia,emc-mode-reset = <0x80000b71>; [all …]
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D | tegra30-asus-nexus7-grouper-memory-timings.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 memory-controller@7000f000 { 5 emc-timings-0 { 6 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */ 8 timing-25500000 { 9 clock-frequency = <25500000>; 11 nvidia,emem-configuration = < 33 timing-51000000 { 34 clock-frequency = <51000000>; 36 nvidia,emem-configuration = < [all …]
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/Linux-v5.10/arch/alpha/kernel/ |
D | time.c | 1 // SPDX-License-Identifier: GPL-2.0 8 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 10 * 1997-01-09 Adrian Sun 12 * 1997-10-29 John Bowman (bowman@math.ualberta.ca) 16 * 1999-04-16 Thorsten Kranzkowski (dl8bcu@gmx.net) 19 * 2003-06-03 R. Scott Bailey <scott.bailey@eds.com> 98 ce->event_handler(ce); in rtc_timer_interrupt() 112 return -EINVAL; in rtc_ce_set_next_event() 178 ce->event_handler(ce); in qemu_timer_interrupt() 253 * While we have free-running timecounters running on all CPUs, and we make [all …]
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