Searched +full:thunderbay +full:- +full:emmc +full:- +full:phy (Results 1 – 7 of 7) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/phy/intel,phy-thunderbay-emmc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Intel Thunder Bay eMMC PHY bindings10 - Srikandan Nandhini <nandhini.srikandan@intel.com>14 const: intel,thunderbay-emmc-phy16 "#phy-cells":25 clock-names:27 - const: emmcclk[all …]
1 # SPDX-License-Identifier: GPL-2.03 # Phy drivers for Intel platforms6 tristate "Intel Keem Bay EMMC PHY driver"15 will be called phy-keembay-emmc.ko.18 tristate "Intel Keem Bay USB PHY driver"27 will be called phy-keembay-usb.ko.44 tristate "Intel Lightning Mountain EMMC PHY driver"48 Enable this to support the Intel EMMC PHY51 tristate "Intel Thunder Bay eMMC PHY driver"55 This option enables support for Intel Thunder Bay SoC eMMC PHY.[all …]
1 # SPDX-License-Identifier: GPL-2.02 obj-$(CONFIG_PHY_INTEL_KEEMBAY_EMMC) += phy-intel-keembay-emmc.o3 obj-$(CONFIG_PHY_INTEL_KEEMBAY_USB) += phy-intel-keembay-usb.o4 obj-$(CONFIG_PHY_INTEL_LGM_COMBO) += phy-intel-lgm-combo.o5 obj-$(CONFIG_PHY_INTEL_LGM_EMMC) += phy-intel-lgm-emmc.o6 obj-$(CONFIG_PHY_INTEL_THUNDERBAY_EMMC) += phy-intel-thunderbay-emmc.o
1 // SPDX-License-Identifier: GPL-2.0-only3 * Intel ThunderBay eMMC PHY driver15 #include <linux/phy/phy.h>18 /* eMMC/SD/SDIO core/phy configuration registers */134 /* Phy power status */140 * To avoid incorrectly setting the phy for init(400KHZ) "phy_power_sts" is used.141 * When actual clock is set always phy is powered off once and then powered on.144 * 0 --> init settings145 * 1 --> actual settings159 tmp = readl(tbh_phy->reg_base + offset); in update_reg()[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"10 - Adrian Hunter <adrian.hunter@intel.com>13 - $ref: "mmc-controller.yaml#"14 - if:18 const: arasan,sdhci-5.121 - phys22 - phy-names23 - if:[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later4 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>9 * Based on sdhci-of-esdhc.c18 #include <linux/clk-provider.h>22 #include <linux/phy/phy.h>25 #include <linux/firmware/xlnx-zynqmp.h>28 #include "sdhci-cqhci.h"29 #include "sdhci-pltfm.h"56 * On some SoCs the syscon area has a feature where the upper 16-bits of57 * each 32-bit register act as a write mask for the lower 16-bits. This allows[all …]
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]
