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Searched +full:tegra20 +full:- +full:mc +full:- +full:gart (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.15/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra20-mc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra20-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra20 SoC Memory Controller
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
15 The Tegra20 Memory Controller merges request streams from various client
18 has a configurable arbitration algorithm to allow the user to fine-tune
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/Linux-v5.15/drivers/iommu/
Dtegra-gart.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * IOMMU API for Graphics Address Relocation Table on Tegra20
5 * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
10 #define dev_fmt(fmt) "gart: " fmt
20 #include <soc/tegra/mc.h>
23 #define GART_CONFIG (0x24 - GART_REG_BASE)
24 #define GART_ENTRY_ADDR (0x28 - GART_REG_BASE)
25 #define GART_ENTRY_DATA (0x2c - GART_REG_BASE)
55 * must have these read-back to ensure the APB/AHB bus transaction is
58 #define FLUSH_GART_REGS(gart) readl_relaxed((gart)->regs + GART_CONFIG) argument
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/Linux-v5.15/arch/arm/boot/dts/
Dtegra20.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra20-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra20-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/soc/tegra-pmc.h>
9 #include "tegra20-peripherals-opp.dtsi"
12 compatible = "nvidia,tegra20";
13 interrupt-parent = <&lic>;
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/Linux-v5.15/drivers/memory/tegra/
Dmc.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
21 #include "mc.h"
25 { .compatible = "nvidia,tegra20-mc-gart", .data = &tegra20_mc_soc },
28 { .compatible = "nvidia,tegra30-mc", .data = &tegra30_mc_soc },
31 { .compatible = "nvidia,tegra114-mc", .data = &tegra114_mc_soc },
34 { .compatible = "nvidia,tegra124-mc", .data = &tegra124_mc_soc },
37 { .compatible = "nvidia,tegra132-mc", .data = &tegra132_mc_soc },
40 { .compatible = "nvidia,tegra210-mc", .data = &tegra210_mc_soc },
43 { .compatible = "nvidia,tegra186-mc", .data = &tegra186_mc_soc },
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Dtegra20.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <dt-bindings/memory/tegra20-mc.h>
15 #include "mc.h"
74 const struct tegra_mc *mc; member
278 static int tegra20_mc_hotreset_assert(struct tegra_mc *mc, in tegra20_mc_hotreset_assert() argument
284 spin_lock_irqsave(&mc->lock, flags); in tegra20_mc_hotreset_assert()
286 value = mc_readl(mc, rst->reset); in tegra20_mc_hotreset_assert()
287 mc_writel(mc, value & ~BIT(rst->bit), rst->reset); in tegra20_mc_hotreset_assert()
289 spin_unlock_irqrestore(&mc->lock, flags); in tegra20_mc_hotreset_assert()
294 static int tegra20_mc_hotreset_deassert(struct tegra_mc *mc, in tegra20_mc_hotreset_deassert() argument
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