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/Linux-v5.10/Documentation/devicetree/bindings/display/
Dallwinner,sun4i-a10-tcon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Timings Controller (TCON) Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The TCON acts as a timing controller for RGB, LVDS and TV
18 "#clock-cells":
23 - const: allwinner,sun4i-a10-tcon
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/Linux-v5.10/drivers/gpu/drm/sun4i/
Dsun4i_rgb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
27 struct sun4i_tcon *tcon; member
51 return drm_panel_get_modes(rgb->panel, connector); in sun4i_rgb_get_modes()
55 * VESA DMT defines a tolerance of 0.5% on the pixel clock, while the
57 * good default tolerance for the EDID-based modes. Define it to 5 per
66 struct sun4i_tcon *tcon = rgb->tcon; in sun4i_rgb_mode_valid() local
67 u32 hsync = mode->hsync_end - mode->hsync_start; in sun4i_rgb_mode_valid()
68 u32 vsync = mode->vsync_end - mode->vsync_start; in sun4i_rgb_mode_valid()
69 unsigned long long rate = mode->clock * 1000; in sun4i_rgb_mode_valid()
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Dsun4i_tcon.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Boris Brezillon <boris.brezillon@free-electrons.com>
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
26 #define SUN4I_TCON_GINT0_VBLANK_ENABLE(pipe) BIT(31 - (pipe))
29 #define SUN4I_TCON_GINT0_VBLANK_INT(pipe) BIT(15 - (pipe))
66 #define SUN4I_TCON0_BASIC0_X(width) ((((width) - 1) & 0xfff) << 16)
67 #define SUN4I_TCON0_BASIC0_Y(height) (((height) - 1) & 0xfff)
70 #define SUN4I_TCON0_BASIC1_H_TOTAL(total) ((((total) - 1) & 0x1fff) << 16)
71 #define SUN4I_TCON0_BASIC1_H_BACKPORCH(bp) (((bp) - 1) & 0xfff)
75 #define SUN4I_TCON0_BASIC2_V_BACKPORCH(bp) (((bp) - 1) & 0xfff)
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Dsun4i_tcon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
47 drm_connector_list_iter_begin(encoder->dev, &iter); in sun4i_tcon_get_connector()
49 if (connector->encoder == encoder) { in sun4i_tcon_get_connector()
65 return -EINVAL; in sun4i_tcon_get_pixel_depth()
67 info = &connector->display_info; in sun4i_tcon_get_pixel_depth()
68 if (info->num_bus_formats != 1) in sun4i_tcon_get_pixel_depth()
69 return -EINVAL; in sun4i_tcon_get_pixel_depth()
71 switch (info->bus_formats[0]) { in sun4i_tcon_get_pixel_depth()
80 return -EINVAL; in sun4i_tcon_get_pixel_depth()
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Dsun4i_backend.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
14 #include <linux/dma-mapping.h>
34 /* backend <-> TCON muxing selection done in backend */
54 regmap_write(engine->regs, SUN4I_BACKEND_OCCTL_REG, in sun4i_backend_apply_color_correction()
58 regmap_write(engine->regs, SUN4I_BACKEND_OCRCOEF_REG(i), in sun4i_backend_apply_color_correction()
67 regmap_update_bits(engine->regs, SUN4I_BACKEND_OCCTL_REG, in sun4i_backend_disable_color_correction()
75 regmap_write(engine->regs, SUN4I_BACKEND_REGBUFFCTL_REG, in sun4i_backend_commit()
93 regmap_update_bits(backend->engine.regs, SUN4I_BACKEND_MODCTL_REG, in sun4i_backend_layer_enable()
133 return -EINVAL; in sun4i_backend_drm_format_to_layer()
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/Linux-v5.10/drivers/gpu/drm/fsl-dcu/
Dfsl_dcu_drm_drv.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
56 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; in fsl_dcu_irq_uninstall()
58 regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0); in fsl_dcu_irq_uninstall()
59 regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0); in fsl_dcu_irq_uninstall()
64 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; in fsl_dcu_load()
69 dev_err(dev->dev, "failed to initialize mode setting\n"); in fsl_dcu_load()
73 ret = drm_vblank_init(dev, dev->mode_config.num_crtc); in fsl_dcu_load()
75 dev_err(dev->dev, "failed to initialize vblank\n"); in fsl_dcu_load()
79 ret = drm_irq_install(dev, fsl_dev->irq); in fsl_dcu_load()
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/Linux-v5.10/arch/arm/boot/dts/
Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/thermal/thermal.h>
45 #include <dt-bindings/dma/sun4i-a10.h>
46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
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Dsun6i-a31.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/reset/sun6i-a31-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <1>;
61 #address-cells = <1>;
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Dsun5i.dtsi2 * Copyright 2012-2015 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun5i-ccu.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
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Dsun8i-v3s.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
45 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
46 #include <dt-bindings/clock/sun8i-de2.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
51 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <1>;
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Dsun7i-a20.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
47 #include <dt-bindings/dma/sun4i-a10.h>
48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
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Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 #include <dt-bindings/thermal/thermal.h>
56 interrupt-parent = <&gic>;
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Dsun9i-a80.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun9i-a80-ccu.h>
48 #include <dt-bindings/clock/sun9i-a80-de.h>
49 #include <dt-bindings/clock/sun9i-a80-usb.h>
50 #include <dt-bindings/reset/sun9i-a80-ccu.h>
51 #include <dt-bindings/reset/sun9i-a80-de.h>
52 #include <dt-bindings/reset/sun9i-a80-usb.h>
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Dsun8i-a23-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
48 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
51 interrupt-parent = <&gic>;
52 #address-cells = <1>;
53 #size-cells = <1>;
56 #address-cells = <1>;
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/Linux-v5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-a64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun8i-de2.h>
8 #include <dt-bindings/clock/sun8i-r-ccu.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/reset/sun50i-a64-ccu.h>
11 #include <dt-bindings/reset/sun8i-de2.h>
12 #include <dt-bindings/reset/sun8i-r-ccu.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
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/Linux-v5.10/drivers/gpu/drm/panel/
Dpanel-simple.c17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
130 for (i = 0; i < panel->desc->num_timings; i++) { in panel_simple_get_timings_modes()
131 const struct display_timing *dt = &panel->desc->timings[i]; in panel_simple_get_timings_modes()
135 mode = drm_mode_create(connector->dev); in panel_simple_get_timings_modes()
137 dev_err(panel->base.dev, "failed to add mode %ux%u\n", in panel_simple_get_timings_modes()
138 dt->hactive.typ, dt->vactive.typ); in panel_simple_get_timings_modes()
144 mode->type |= DRM_MODE_TYPE_DRIVER; in panel_simple_get_timings_modes()
146 if (panel->desc->num_timings == 1) in panel_simple_get_timings_modes()
147 mode->type |= DRM_MODE_TYPE_PREFERRED; in panel_simple_get_timings_modes()
162 for (i = 0; i < panel->desc->num_modes; i++) { in panel_simple_get_display_modes()
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