Home
last modified time | relevance | path

Searched +full:syscon +full:- +full:wakeup (Results 1 – 25 of 115) sorted by relevance

12345

/Linux-v5.15/Documentation/devicetree/bindings/arm/
Datmel-sysregs.txt4 - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
5 - reg : Should contain registers location and length
8 - compatible: Should be "atmel,at91sam9260-pit"
9 - reg: Should contain registers location and length
10 - interrupts: Should contain interrupt for the PIT which is the IRQ line
14 - compatible: Should be "microchip,sam9x60-pit64b"
15 - reg: Should contain registers location and length
16 - interrupts: Should contain interrupt for PIT64B timer
17 - clocks: Should contain the available clock sources for PIT64B timer.
20 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/usb/
Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: "usb-xhci.yaml"
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
[all …]
Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: "usb-drd.yaml"
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8192-mtu3
[all …]
Dfaraday,fotg210.txt3 This OTG-capable USB host controller is found in Cortina Systems
7 - compatible: should be one of:
9 "cortina,gemini-usb", "faraday,fotg210"
10 - reg: should contain one register range i.e. start and length
11 - interrupts: description of the interrupt line
14 - clocks: should contain the IP block clock
15 - clock-names: should be "PCLK" for the IP block clock
17 Required properties for "cortina,gemini-usb" compatible:
18 - syscon: a phandle to the system controller to access PHY registers
20 Optional properties for "cortina,gemini-usb" compatible:
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dti,omap-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kishon Vijay Abraham I <kishon@ti.com>
11 - Roger Quadros <rogerq@ti.com>
16 - items:
17 - enum:
18 - ti,dra7x-usb2
19 - ti,dra7x-usb2-phy2
[all …]
Dti-phy.txt6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
20 - reg-names: "otghs_control" for control-phy-otghs
21 "power", "pcie_pcs" and "control_sma" for control-phy-pcie
[all …]
Dbrcm,brcmstb-usb-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/brcm,brcmstb-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Al Cooper <alcooperx@gmail.com>
13 - Rafał Miłecki <rafal@milecki.pl>
18 - brcm,bcm4908-usb-phy
19 - brcm,bcm7211-usb-phy
20 - brcm,bcm7216-usb-phy
21 - brcm,brcmstb-usb-phy
[all …]
/Linux-v5.15/arch/arm/mach-s5pv210/
Dpm.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
6 // S5PV210 - Power Management support
8 // Based on arch/arm/mach-s3c2410/pm.c
16 #include <linux/soc/samsung/s3c-pm.h>
22 #include "regs-clock.h"
34 * s3c_pm_do_save() - save a set of registers for restoration on resume.
39 * array for later restoration when we wakeup.
43 for (; count > 0; count--, ptr++) { in s3c_pm_do_save()
44 ptr->val = readl_relaxed(ptr->reg); in s3c_pm_do_save()
[all …]
/Linux-v5.15/drivers/input/keyboard/
Dsnvs_pwrkey.c1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/mfd/syscon.h>
39 int wakeup; member
48 struct input_dev *input = pdata->input; in imx_imx_snvs_check_for_events()
51 regmap_read(pdata->snvs, SNVS_HPSR_REG, &state); in imx_imx_snvs_check_for_events()
55 if (state ^ pdata->keystate) { in imx_imx_snvs_check_for_events()
56 pdata->keystate = state; in imx_imx_snvs_check_for_events()
57 input_event(input, EV_KEY, pdata->keycode, state); in imx_imx_snvs_check_for_events()
59 pm_relax(pdata->input->dev.parent); in imx_imx_snvs_check_for_events()
64 mod_timer(&pdata->check_timer, in imx_imx_snvs_check_for_events()
[all …]
/Linux-v5.15/arch/arm64/boot/dts/sprd/
Dsc9860.dtsi6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
53 compatible = "arm,cortex-a53";
55 enable-method = "psci";
56 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Dgemini-nas4220b.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for the Gemini-based Raidsonic NAS IB-4220-B
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
12 model = "Raidsonic NAS IB-4220-B";
13 compatible = "raidsonic,ib-4220-b", "cortina,gemini";
14 #address-cells = <1>;
15 #size-cells = <1>;
24 stdout-path = &uart0;
28 compatible = "gpio-keys";
[all …]
Dat91sam9260ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
17 stdout-path = &dbgu;
26 clock-frequency = <32768>;
30 clock-frequency = <18432000>;
38 compatible = "atmel,tcb-timer";
43 compatible = "atmel,tcb-timer";
49 atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
54 pinctrl-0 = <
[all …]
Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
Dexynos5410.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5410.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 compatible = "arm,cortex-a15";
37 clock-frequency = <1600000000>;
42 compatible = "arm,cortex-a15";
[all …]
Dgemini-rut1xx.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
24 stdout-path = &uart0;
28 compatible = "gpio-keys";
30 button-setup {
31 debounce-interval = <100>;
32 wakeup-source;
[all …]
Dat91sam9g20ek_common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9g20ek_common.dtsi - Device Tree file for Atmel at91sam9g20ek board
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 #include <dt-bindings/input/input.h>
14 stdout-path = "serial0:115200n8";
23 clock-frequency = <32768>;
27 clock-frequency = <18432000>;
43 pinctrl_board_mmc0_slot1: mmc0_slot1-board {
56 compatible = "atmel,tcb-timer";
61 compatible = "atmel,tcb-timer";
[all …]
Dbcm7445.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #address-cells = <2>;
6 #size-cells = <2>;
9 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "brcm,brahma-b15";
22 enable-method = "brcm,brahma-b15";
27 compatible = "brcm,brahma-b15";
[all …]
Dgemini-sl93512r.dts1 // SPDX-License-Identifier: GPL-2.0
5 * "Gemini324 EV-Board" before Storm acquired Storlink Semiconductor.
9 /dts-v1/;
12 #include <dt-bindings/input/input.h>
15 model = "Storlink Semiconductor Gemini324 EV-Board / Storm Semiconductor SL93512R_BRD";
17 #address-cells = <1>;
18 #size-cells = <1>;
28 stdout-path = &uart0;
32 compatible = "gpio-keys";
34 button-wps {
[all …]
Dgemini-wbd111.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for Wiliboard WBD-111
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
12 model = "Wiliboard WBD-111";
14 #address-cells = <1>;
15 #size-cells = <1>;
25 stdout-path = &uart0;
29 compatible = "gpio-keys";
31 button-setup {
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/clock/
Dst,stm32mp1-rcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Fernandez <gabriel.fernandez@st.com>
14 RCC makes also power management (resume/supend and wakeup interrupt).
18 Documentation/devicetree/bindings/clock/clock-bindings.txt
24 dt-bindings/clock/stm32mp1-clks.h header and can be used in device
43 include/dt-bindings/reset-controller/stm32mp1-resets.h
49 "#clock-cells":
[all …]
/Linux-v5.15/drivers/usb/mtu3/
Dmtu3_host.c1 // SPDX-License-Identifier: GPL-2.0
3 * mtu3_dr.c - dual role switch and host glue layer
13 #include <linux/mfd/syscon.h>
49 * ip-sleep wakeup mode:
56 switch (ssusb->uwk_vers) { in ssusb_wakeup_ip_sleep_set()
58 reg = ssusb->uwk_reg_base + PERI_WK_CTRL1; in ssusb_wakeup_ip_sleep_set()
63 reg = ssusb->uwk_reg_base + PERI_WK_CTRL0; in ssusb_wakeup_ip_sleep_set()
68 reg = ssusb->uwk_reg_base + PERI_WK_CTRL0; in ssusb_wakeup_ip_sleep_set()
73 reg = ssusb->uwk_reg_base + PERI_SSUSB_SPM_CTRL; in ssusb_wakeup_ip_sleep_set()
80 regmap_update_bits(ssusb->uwk, reg, msk, val); in ssusb_wakeup_ip_sleep_set()
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/arm/marvell/
Dcp110-system-controller.txt6 giving access to numerous features: clocks, pin-muxing and many other
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the CP110 system controller
18 -------
23 - a set of core clocks
24 - a set of gatable clocks
28 - The first cell must be 0 or 1. 0 for the core clocks and 1 for the
30 - The second cell identifies the particular core clock or gatable
34 - Core clocks
35 - 0 0 APLL
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/mfd/
Dqcom-rpm.txt8 - compatible:
12 "qcom,rpm-apq8064"
13 "qcom,rpm-msm8660"
14 "qcom,rpm-msm8960"
15 "qcom,rpm-ipq8064"
16 "qcom,rpm-mdm9615"
18 - reg:
20 Value type: <prop-encoded-array>
23 - interrupts:
25 Value type: <prop-encoded-array>
[all …]
/Linux-v5.15/drivers/gpio/
Dgpio-sama5d2-piobu.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/mfd/syscon.h>
26 * wakeup signal generation
53 * sama5d2_piobu_setup_pin() - prepares a pin for set_direction call
56 * Do not consider pin as tamper wakeup interrupt source
65 ret = regmap_update_bits(piobu->regmap, PIOBU_BMPR, mask, 0); in sama5d2_piobu_setup_pin()
69 ret = regmap_update_bits(piobu->regmap, PIOBU_NMPR, mask, 0); in sama5d2_piobu_setup_pin()
73 return regmap_update_bits(piobu->regmap, PIOBU_WKPR, mask, 0); in sama5d2_piobu_setup_pin()
77 * sama5d2_piobu_write_value() - writes value & mask at the pin's PIOBU register
88 return regmap_update_bits(piobu->regmap, reg, mask, value); in sama5d2_piobu_write_value()
[all …]
/Linux-v5.15/drivers/usb/host/
Dxhci-mtk.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/dma-mapping.h>
13 #include <linux/mfd/syscon.h>
23 #include "xhci-mtk.h"
80 /* usb remote wakeup registers in syscon */
117 struct device *dev = mtk->dev; in xhci_mtk_set_frame_interval()
118 struct usb_hcd *hcd = mtk->hcd; in xhci_mtk_set_frame_interval()
121 if (!of_device_is_compatible(dev->of_node, "mediatek,mt8195-xhci")) in xhci_mtk_set_frame_interval()
124 value = readl(hcd->regs + HFCNTR_CFG); in xhci_mtk_set_frame_interval()
127 writel(value, hcd->regs + HFCNTR_CFG); in xhci_mtk_set_frame_interval()
[all …]

12345