Searched full:sysclk_div (Results 1 – 5 of 5) sorted by relevance
/Linux-v5.10/drivers/clk/mmp/ |
D | clk-audio.c | 64 struct clk_divider sysclk_div; member 262 priv->sysclk_div.hw.init = CLK_HW_INIT_HW("sys_div", in register_clocks() 265 priv->sysclk_div.reg = priv->mmio_base + SSPA_AUD_CTRL; in register_clocks() 266 priv->sysclk_div.shift = SSPA_AUD_CTRL_SYSCLK_DIV_SHIFT; in register_clocks() 267 priv->sysclk_div.width = 6; in register_clocks() 268 priv->sysclk_div.flags = CLK_DIVIDER_ONE_BASED; in register_clocks() 269 priv->sysclk_div.flags |= CLK_DIVIDER_ROUND_CLOSEST; in register_clocks() 270 priv->sysclk_div.flags |= CLK_DIVIDER_ALLOW_ZERO; in register_clocks() 271 ret = devm_clk_hw_register(dev, &priv->sysclk_div.hw); in register_clocks() 276 &priv->sysclk_div.hw, &clk_gate_ops, in register_clocks()
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/Linux-v5.10/arch/arm/boot/dts/ |
D | am43xx-clocks.dtsi | 370 sysclk_div: sysclk_div { label 381 clocks = <&sysclk_div>, <&dpll_disp_m2_ck>; 458 clocks = <&sysclk_div>; 498 clocks = <&sysclk_div>, <&dpll_core_m5_ck>, <&dpll_disp_m2_ck>; 535 clocks = <&sysclk_div>, <&dpll_per_m2_ck>; 664 clocks = <&sysclk_div>; 720 clocks = <&clk_rc32k_ck>, <&sysclk_div>, <&dpll_ddr_m2_ck>,
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/Linux-v5.10/drivers/clk/ |
D | clk-tango4.c | 12 #define SYSCLK_DIV 0x20 macro 62 if (readl(base + SYSCLK_DIV) & DIV_BYPASS) in tango4_clkgen_setup()
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/Linux-v5.10/Documentation/devicetree/bindings/soc/ti/ |
D | ti,pruss.yaml | 417 clocks = <&sysclk_div>, /* icss_iep */
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/Linux-v5.10/sound/soc/codecs/ |
D | wm8996.h | 1615 #define WM8996_SYSCLK_DIV 0x0002 /* SYSCLK_DIV */ 1616 #define WM8996_SYSCLK_DIV_MASK 0x0002 /* SYSCLK_DIV */ 1617 #define WM8996_SYSCLK_DIV_SHIFT 1 /* SYSCLK_DIV */ 1618 #define WM8996_SYSCLK_DIV_WIDTH 1 /* SYSCLK_DIV */
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