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/Linux-v5.15/arch/arm/boot/dts/
Domap24xx-clocks.dtsi99 sys_ck: sys_ck@60 { label
124 clocks = <&sys_ck>, <&sys_ck>;
131 clocks = <&sys_ck>;
141 clocks = <&sys_ck>;
203 clocks = <&core_ck>, <&sys_ck>, <&func_96m_ck>, <&func_54m_ck>;
431 …clocks = <&sys_ck>, <&core_ck>, <&core_d2_ck>, <&core_d3_ck>, <&core_d4_ck>, <&core_d5_ck>, <&core…
453 clocks = <&sys_ck>, <&func_48m_ck>;
528 clocks = <&sys_ck>;
544 clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
573 clocks = <&func_32k_ck>, <&sys_ck>, <&alt_ck>;
[all …]
Domap3xxx-clocks.dtsi21 sys_ck: sys_ck@1270 { label
74 clocks = <&sys_ck>;
196 clocks = <&sys_ck>, <&sys_ck>;
237 clocks = <&sys_ck>, <&sys_ck>;
319 clocks = <&sys_ck>, <&dpll1_fck>;
351 clocks = <&cm_96m_fck>, <&sys_ck>;
517 clocks = <&core_ck>, <&sys_ck>, <&cm_96m_fck>, <&omap_54m_fck>;
593 clocks = <&sys_ck>;
601 clocks = <&omap_32k_fck>, <&sys_ck>;
615 clocks = <&sys_ck>;
[all …]
Domap34xx-omap36xx-clocks.dtsi132 clocks = <&sys_ck>;
140 clocks = <&sys_ck>;
166 clocks = <&sys_ck>, <&dpll2_fck>;
193 clocks = <&sys_ck>;
Domap36xx-clocks.dtsi11 clocks = <&sys_ck>, <&sys_ck>;
Domap36xx-am35xx-omap3430es2plus-clocks.dtsi28 clocks = <&sys_ck>, <&sys_ck>;
115 clocks = <&sys_ck>;
Dam35xx-clocks.dtsi51 clocks = <&sys_ck>;
59 clocks = <&sys_ck>;
Dam3517.dtsi185 assigned-clock-parents = <&sys_ck>;
195 assigned-clock-parents = <&sys_ck>;
Domap36xx-omap3430es2plus-clocks.dtsi74 clocks = <&sys_ck>;
146 …clocks = <&sys_ck>, <&sys_d2_ck>, <&omap_96m_d2_fck>, <&omap_96m_d4_fck>, <&omap_96m_d8_fck>, <&om…
Domap3-devkit8000.dts47 assigned-clock-parents = <&sys_ck>;
Domap3430es1-clocks.dtsi52 clocks = <&sys_ck>;
/Linux-v5.15/arch/arm/mach-omap2/
Dclkt2xxx_virt_prcm_set.c188 * omap2xxx_clkt_vps_late_init - store a copy of the sys_ck rate
190 * Store a copy of the sys_ck rate for later use by the OMAP2xxx DVFS
191 * code. (The sys_ck rate does not -- or rather, must not -- change
193 * sys_ck rate, but before the virt_prcm_set clock rate is
200 c = clk_get(NULL, "sys_ck"); in omap2xxx_clkt_vps_late_init()
202 WARN(1, "could not locate sys_ck\n"); in omap2xxx_clkt_vps_late_init()
Dvoltage.c247 struct clk *sys_ck; in omap_voltage_late_init() local
252 sys_ck = clk_get(NULL, voltdm->sys_clk.name); in omap_voltage_late_init()
253 if (IS_ERR(sys_ck)) { in omap_voltage_late_init()
257 voltdm->sys_clk.rate = clk_get_rate(sys_ck); in omap_voltage_late_init()
259 clk_put(sys_ck); in omap_voltage_late_init()
Domap2-restart.c19 * clock and the sys_ck. Used during the reset process
56 reset_sys_ck = clk_get(NULL, "sys_ck"); in omap2xxx_common_look_up_clks_for_reset()
Dvoltagedomains3xxx_data.c95 static const char *const sys_clk_name __initconst = "sys_ck";
/Linux-v5.15/Documentation/devicetree/bindings/usb/
Dmediatek,mtu3.yaml69 - const: sys_ck # required, others are optional
232 clock-names = "sys_ck";
250 clock-names = "sys_ck", "ref_ck";
268 clock-names = "sys_ck";
282 clock-names = "sys_ck", "ref_ck";
302 clock-names = "sys_ck";
318 clock-names = "sys_ck";
Dmediatek,mtk-xhci.yaml79 - const: sys_ck # required, the following ones are optional
200 clock-names = "sys_ck", "ref_ck";
/Linux-v5.15/drivers/clk/ti/
Dclk-2xxx.c34 DT_CLK(NULL, "sys_ck", "sys_ck"),
146 DT_CLK(NULL, "timer_sys_ck", "sys_ck"),
242 (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 1000000), in omap2xxx_dt_clk_init()
243 (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 100000) % 10, in omap2xxx_dt_clk_init()
/Linux-v5.15/Documentation/devicetree/bindings/clock/ti/
Ddpll.txt79 clocks = <&sys_ck>, <&dpll2_fck>;
96 clocks = <&sys_ck>, <&sys_ck>;
Dapll.txt40 clocks = <&sys_ck>;
/Linux-v5.15/drivers/pci/controller/
Dpcie-mediatek.c170 * @sys_ck: pointer to transaction/data link layer clock
192 struct clk *sys_ck; member
260 clk_disable_unprepare(port->sys_ck); in mtk_pcie_put_resources()
836 err = clk_prepare_enable(port->sys_ck); in mtk_pcie_enable_port()
838 dev_err(dev, "failed to enable sys_ck%d clock\n", port->slot); in mtk_pcie_enable_port()
906 clk_disable_unprepare(port->sys_ck); in mtk_pcie_enable_port()
932 snprintf(name, sizeof(name), "sys_ck%d", slot); in mtk_pcie_parse_port()
933 port->sys_ck = devm_clk_get(dev, name); in mtk_pcie_parse_port()
934 if (IS_ERR(port->sys_ck)) { in mtk_pcie_parse_port()
935 dev_err(dev, "failed to get sys_ck%d clock\n", slot); in mtk_pcie_parse_port()
[all …]
/Linux-v5.15/drivers/video/fbdev/omap/
Dhwa742.c130 struct clk *sys_ck; member
916 clk_disable(hwa742.sys_ck); in hwa742_suspend()
921 clk_enable(hwa742.sys_ck); in hwa742_resume()
953 hwa742.sys_ck = clk_get(NULL, "hwa_sys_ck"); in hwa742_init()
963 ext_clk = clk_get_rate(hwa742.sys_ck); in hwa742_init()
967 clk_enable(hwa742.sys_ck); in hwa742_init()
1026 clk_disable(hwa742.sys_ck); in hwa742_init()
1040 clk_disable(hwa742.sys_ck); in hwa742_cleanup()
/Linux-v5.15/include/dt-bindings/clock/
Dstm32h7-clks.h31 #define SYS_CK 30 macro
/Linux-v5.15/arch/arm/mach-omap1/
Dclock_data.c64 #define SOFT_PERIPH_REQ_SHIFT 5 /* sys_ck gate for UART2 ? */
66 #define SOFT_USB_REQ_SHIFT 3 /* sys_ck gate for USB host? */
67 #define SOFT_SDW_REQ_SHIFT 2 /* sys_ck gate for Bluetooth? */
68 #define SOFT_COM_REQ_SHIFT 1 /* sys_ck gate for com proc? */
/Linux-v5.15/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi801 clock-names = "sys_ck";
816 clock-names = "sys_ck", "ref_ck";
865 clock-names = "sys_ck";
880 clock-names = "sys_ck", "ref_ck";
/Linux-v5.15/drivers/clk/
Dclk-stm32h7.c83 static const char * const dfsdm1_src[] = { "pclk2", "sys_ck" };
144 "sys_ck", "pll2_p", "hse_ck", "pll1_p", "csi_ck", "lsi_ck" };
514 "sys_ck", CLK_IGNORE_UNUSED, base + RCC_D1CFGR, 8, 4, 0, in register_core_and_bus_clocks()
584 M_MCLOC("sys_ck", sys_src, RCC_CFGR, 0, 3),

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