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/Linux-v5.15/arch/arm/boot/dts/
Dtegra124-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 emc_icc_dvfs_opp_table: emc-dvfs-opp-table {
5 compatible = "operating-points-v2";
8 opp-microvolt = <800000 800000 1150000>;
9 opp-hz = /bits/ 64 <12750000>;
10 opp-supported-hw = <0x0003>;
14 opp-microvolt = <950000 950000 1150000>;
15 opp-hz = /bits/ 64 <12750000>;
16 opp-supported-hw = <0x0008>;
20 opp-microvolt = <1050000 1050000 1150000>;
[all …]
Dtegra30-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 emc_icc_dvfs_opp_table: emc-dvfs-opp-table {
5 compatible = "operating-points-v2";
8 opp-microvolt = <950000 950000 1350000>;
9 opp-hz = /bits/ 64 <12750000>;
10 opp-supported-hw = <0x0006>;
14 opp-microvolt = <1000000 1000000 1350000>;
15 opp-hz = /bits/ 64 <12750000>;
16 opp-supported-hw = <0x0001>;
20 opp-microvolt = <1250000 1250000 1350000>;
[all …]
Dtegra30-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "operating-points-v2";
6 opp-shared;
9 clock-latency-ns = <100000>;
10 opp-supported-hw = <0x1F 0x31FE>;
11 opp-hz = /bits/ 64 <51000000>;
15 clock-latency-ns = <100000>;
16 opp-supported-hw = <0x1F 0x0C01>;
17 opp-hz = /bits/ 64 <51000000>;
21 clock-latency-ns = <100000>;
[all …]
Dtegra20-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "operating-points-v2";
6 opp-shared;
9 clock-latency-ns = <400000>;
10 opp-supported-hw = <0x0F 0x0003>;
11 opp-hz = /bits/ 64 <216000000>;
12 opp-suspend;
16 clock-latency-ns = <400000>;
17 opp-supported-hw = <0x0F 0x0004>;
18 opp-hz = /bits/ 64 <216000000>;
[all …]
Dtegra20-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 emc_icc_dvfs_opp_table: emc-dvfs-opp-table {
5 compatible = "operating-points-v2";
8 opp-microvolt = <950000 950000 1300000>;
9 opp-hz = /bits/ 64 <36000000>;
10 opp-supported-hw = <0x000F>;
14 opp-microvolt = <950000 950000 1300000>;
15 opp-hz = /bits/ 64 <47500000>;
16 opp-supported-hw = <0x000F>;
20 opp-microvolt = <950000 950000 1300000>;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/opp/
Dqcom-nvmem-cpufreq.txt8 defines the voltage and frequency value based on the msm-id in SMEM
10 The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
11 to provide the OPP framework with required information (existing HW bitmap).
13 operating-points-v2 table when it is parsed by the OPP framework.
16 --------------------
18 - operating-points-v2: Phandle to the operating-points-v2 table to use.
20 In 'operating-points-v2' table:
21 - compatible: Should be
22 - 'operating-points-v2-kryo-cpu' for apq8096, msm8996, msm8974,
26 --------------------
[all …]
/Linux-v5.15/drivers/net/ieee802154/
Dfakelb.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2007-2012 Siemens AG
9 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
31 struct ieee802154_hw *hw; member
42 static int fakelb_hw_ed(struct ieee802154_hw *hw, u8 *level) in fakelb_hw_ed() argument
50 static int fakelb_hw_channel(struct ieee802154_hw *hw, u8 page, u8 channel) in fakelb_hw_channel() argument
52 struct fakelb_phy *phy = hw->priv; in fakelb_hw_channel()
55 phy->page = page; in fakelb_hw_channel()
56 phy->channel = channel; in fakelb_hw_channel()
61 static int fakelb_hw_xmit(struct ieee802154_hw *hw, struct sk_buff *skb) in fakelb_hw_xmit() argument
[all …]
Datusb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * atusb.c - Driver for the ATUSB IEEE 802.15.4 dongle
7 * Copyright (c) 2015 - 2016 Stefan Schmidt <stefan@datenfreihafen.org>
12 * Written by: Dmitry Eremin-Solenikov <dmitry.baryshkov@siemens.com>
46 struct ieee802154_hw *hw; member
49 int shutdown; /* non-zero if shutting down */
77 /* ----- USB commands without data ----------------------------------------- */
80 * in atusb->err and reject all subsequent requests until the error is cleared.
88 struct usb_device *usb_dev = atusb->usb_dev; in atusb_control_msg()
91 if (atusb->err) in atusb_control_msg()
[all …]
Dat86rf230.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2012 Siemens AG
8 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
91 struct ieee802154_hw *hw; member
120 if (gpio_is_valid(lp->slp_tr)) { in at86rf230_sleep()
121 gpio_set_value(lp->slp_tr, 1); in at86rf230_sleep()
122 usleep_range(lp->data->t_off_to_sleep, in at86rf230_sleep()
123 lp->data->t_off_to_sleep + 10); in at86rf230_sleep()
124 lp->sleep = true; in at86rf230_sleep()
131 if (gpio_is_valid(lp->slp_tr)) { in at86rf230_awake()
[all …]
Dmac802154_hwsim.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright 2007-2012 Siemens AG
10 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
69 struct ieee802154_hw *hw; member
84 static int hwsim_hw_ed(struct ieee802154_hw *hw, u8 *level) in hwsim_hw_ed() argument
91 static int hwsim_hw_channel(struct ieee802154_hw *hw, u8 page, u8 channel) in hwsim_hw_channel() argument
93 struct hwsim_phy *phy = hw->priv; in hwsim_hw_channel()
98 return -ENOMEM; in hwsim_hw_channel()
100 pib->page = page; in hwsim_hw_channel()
101 pib->channel = channel; in hwsim_hw_channel()
[all …]
/Linux-v5.15/net/mac802154/
Dmain.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2007-2012 Siemens AG
28 while ((skb = skb_dequeue(&local->skb_queue))) { in ieee802154_tasklet_handler()
29 switch (skb->pkt_type) { in ieee802154_tasklet_handler()
31 /* Clear skb->pkt_type in order to not confuse kernel in ieee802154_tasklet_handler()
34 skb->pkt_type = 0; in ieee802154_tasklet_handler()
39 skb->pkt_type); in ieee802154_tasklet_handler()
53 if (WARN_ON(!ops || !(ops->xmit_async || ops->xmit_sync) || !ops->ed || in ieee802154_alloc_hw()
54 !ops->start || !ops->stop || !ops->set_channel)) in ieee802154_alloc_hw()
57 /* Ensure 32-byte alignment of our private data and hw private data. in ieee802154_alloc_hw()
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/cpufreq/
Dti-cpufreq.txt6 The ti-cpufreq driver can use revision and an efuse value from the SoC to
7 provide the OPP framework with supported hardware information. This is
8 used to determine which OPPs from the operating-points-v2 table get enabled
12 --------------------
14 - operating-points-v2: Phandle to the operating-points-v2 table to use.
16 In 'operating-points-v2' table:
17 - compatible: Should be
18 - 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx,
20 - syscon: A phandle pointing to a syscon node representing the control module
24 --------------------
[all …]
Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
9 --------------------
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
13 - Supported speed grade mask
14 - Supported market segment mask
21 --------
24 compatible = "operating-points-v2";
25 opp-1000000000 {
[all …]
/Linux-v5.15/drivers/net/ethernet/atheros/alx/
Dethtool.c47 #include "hw.h"
51 * See hw.h
109 static u32 alx_get_supported_speeds(struct alx_hw *hw) in alx_get_supported_speeds() argument
111 u32 supported = SUPPORTED_10baseT_Half | in alx_get_supported_speeds() local
116 if (alx_hw_giga(hw)) in alx_get_supported_speeds()
117 supported |= SUPPORTED_1000baseT_Full; in alx_get_supported_speeds()
125 return supported; in alx_get_supported_speeds()
132 struct alx_hw *hw = &alx->hw; in alx_get_link_ksettings() local
133 u32 supported, advertising; in alx_get_link_ksettings() local
135 supported = SUPPORTED_Autoneg | in alx_get_link_ksettings()
[all …]
/Linux-v5.15/drivers/net/ethernet/intel/i40e/
Di40e_ethtool.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
13 * struct i40e_stats - definition for an ethtool statistic
14 * @stat_string: statistic name to display in ethtool -S output
62 I40E_QUEUE_STAT("%s-%u.packets", stats.packets),
63 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes),
67 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer
90 p = (char *)pointer + stat->stat_offset; in i40e_add_one_ethtool_stat()
91 switch (stat->sizeof_stat) { in i40e_add_one_ethtool_stat()
106 stat->stat_string); in i40e_add_one_ethtool_stat()
[all …]
/Linux-v5.15/drivers/net/ethernet/atheros/atl1c/
Datl1c_ethtool.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright(c) 2009 - 2009 Atheros Corporation. All rights reserved.
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
19 struct atl1c_hw *hw = &adapter->hw; in atl1c_get_link_ksettings() local
20 u32 supported, advertising; in atl1c_get_link_ksettings() local
22 supported = (SUPPORTED_10baseT_Half | in atl1c_get_link_ksettings()
28 if (hw->link_cap_flags & ATL1C_LINK_CAP_1000M) in atl1c_get_link_ksettings()
29 supported |= SUPPORTED_1000baseT_Full; in atl1c_get_link_ksettings()
33 advertising |= hw->autoneg_advertised; in atl1c_get_link_ksettings()
35 cmd->base.port = PORT_TP; in atl1c_get_link_ksettings()
[all …]
/Linux-v5.15/drivers/net/ethernet/atheros/atl1e/
Datl1e_ethtool.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
19 struct atl1e_hw *hw = &adapter->hw; in atl1e_get_link_ksettings() local
20 u32 supported, advertising; in atl1e_get_link_ksettings() local
22 supported = (SUPPORTED_10baseT_Half | in atl1e_get_link_ksettings()
28 if (hw->nic_type == athr_l1e) in atl1e_get_link_ksettings()
29 supported |= SUPPORTED_1000baseT_Full; in atl1e_get_link_ksettings()
34 advertising |= hw->autoneg_advertised; in atl1e_get_link_ksettings()
36 cmd->base.port = PORT_TP; in atl1e_get_link_ksettings()
37 cmd->base.phy_address = 0; in atl1e_get_link_ksettings()
[all …]
/Linux-v5.15/drivers/net/ethernet/intel/ice/
Dice_ethtool.c1 // SPDX-License-Identifier: GPL-2.0
34 return ((np->vsi->alloc_txq + np->vsi->alloc_rxq) * in ice_q_stats_len()
93 * The PF_STATs are appended to the netdev stats only when ethtool -S
153 u32 bitno; /* bit position in pf->flags */
162 ICE_PRIV_FLAG("link-down-on-close", ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA),
163 ICE_PRIV_FLAG("fw-lldp-agent", ICE_FLAG_FW_LLDP_AGENT),
164 ICE_PRIV_FLAG("vf-true-promisc-support",
166 ICE_PRIV_FLAG("mdd-auto-reset-vf", ICE_FLAG_MDD_AUTO_RESET_VF),
167 ICE_PRIV_FLAG("legacy-rx", ICE_FLAG_LEGACY_RX),
176 struct ice_vsi *vsi = np->vsi; in ice_get_drvinfo()
[all …]
/Linux-v5.15/drivers/net/ethernet/intel/ixgbe/
Dixgbe_ethtool.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
33 sizeof(((struct ixgbe_adapter *)0)->m), \
36 sizeof(((struct rtnl_link_stats64 *)0)->m), \
113 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues
116 (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \
120 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
121 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
122 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
123 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
[all …]
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dsdm660.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
13 compatible = "qcom,adreno-512.0", "qcom,adreno";
14 operating-points-v2 = <&gpu_sdm660_opp_table>;
16 gpu_sdm660_opp_table: opp-table {
17 compatible = "operating-points-v2";
23 * at the same opp-level
25 opp-750000000 {
26 opp-hz = /bits/ 64 <750000000>;
27 opp-level = <RPM_SMD_LEVEL_TURBO>;
28 opp-peak-kBps = <5412000>;
[all …]
/Linux-v5.15/Documentation/networking/dsa/
Dlan9303.rst18 The LAN9303 can be managed both via MDIO and I2C, both supported by this driver.
21 interfaces (which is the default state of a DSA device). Due to HW limitations,
22 no HW MAC learning takes place in this mode.
24 When both user ports are joined to the same bridge, the normal HW MAC learning
25 is enabled. This means that unicast traffic is forwarded in HW. Broadcast and
26 multicast is flooded in HW. STP is also supported in this mode. The driver
27 support fdb/mdb operations as well, meaning IGMP snooping is supported.
36 - Support for VLAN filtering is not implemented
37 - The HW does not support VLAN-specific fdb entries
/Linux-v5.15/Documentation/networking/device_drivers/ethernet/huawei/
Dhinic.rst1 .. SPDX-License-Identifier: GPL-2.0
11 The driver supports a range of link-speed devices (10GbE, 25GbE, 40GbE, etc.).
14 Some HiNIC devices support SR-IOV. This driver is used for Physical Function
17 HiNIC devices support MSI-X interrupt vector for each Tx/Rx queue and
21 TCP Transmit Segmentation Offload(TSO), Receive-Side Scaling(RSS) and
25 Supported PCI vendor ID/device IDs:
28 19e5:1822 - HiNIC PF
34 hinic_dev - Implement a Logical Network device that is independent from
35 specific HW details about HW data structure formats.
37 hinic_hwdev - Implement the HW details of the device and include the components
[all …]
/Linux-v5.15/sound/virtio/
Dvirtio_pcm.c1 // SPDX-License-Identifier: GPL-2.0+
3 * virtio-snd: Virtio sound device
84 * virtsnd_pcm_build_hw() - Parse substream config and build HW descriptor.
89 * Return: 0 on success, -EINVAL if configuration is invalid.
94 struct virtio_device *vdev = vss->snd->vdev; in virtsnd_pcm_build_hw()
100 vss->features = le32_to_cpu(info->features); in virtsnd_pcm_build_hw()
104 * only message-based transport. in virtsnd_pcm_build_hw()
106 vss->hw.info = in virtsnd_pcm_build_hw()
114 if (!info->channels_min || info->channels_min > info->channels_max) { in virtsnd_pcm_build_hw()
115 dev_err(&vdev->dev, in virtsnd_pcm_build_hw()
[all …]
/Linux-v5.15/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_catalog.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
64 * Supported UBWC feature versions
77 * @DPU_MDP_BWC, MDSS HW supports Bandwidth compression.
94 * SSPP sub-blocks/features
100 * @DPU_SSPP_SCALER_RGB, RGB Scaler, supported by RGB pipes
102 * @DPU_SSPP_CSC_10BIT, Support of 10-bit Color space conversion
105 * @DPU_SSPP_QOS_8LVL, SSPP support 8-level QoS control
136 * MIXER sub-blocks/features
138 * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
[all …]
/Linux-v5.15/drivers/net/ethernet/hisilicon/hns3/hns3pf/
Dhclge_mdio.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
46 struct hclge_dev *hdev = bus->priv; in hclge_mdio_write()
50 if (test_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state)) in hclge_mdio_write()
57 hnae3_set_field(mdio_cmd->phyid, HCLGE_MDIO_PHYID_M, in hclge_mdio_write()
59 hnae3_set_field(mdio_cmd->phyad, HCLGE_MDIO_PHYREG_M, in hclge_mdio_write()
62 hnae3_set_bit(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_START_B, 1); in hclge_mdio_write()
63 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_ST_M, in hclge_mdio_write()
65 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_OP_M, in hclge_mdio_write()
68 mdio_cmd->data_wr = cpu_to_le16(data); in hclge_mdio_write()
[all …]

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