Searched +full:sun6i +full:- +full:a31 +full:- +full:spi (Results 1 – 15 of 15) sorted by relevance
4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/interrupt-controller/arm-gic.h>46 #include <dt-bindings/thermal/thermal.h>48 #include <dt-bindings/clock/sun6i-a31-ccu.h>49 #include <dt-bindings/clock/sun6i-rtc.h>50 #include <dt-bindings/reset/sun6i-a31-ccu.h>53 interrupt-parent = <&gic>;54 #address-cells = <1>;55 #size-cells = <1>;[all …]
4 * This file is dual-licensed: you can use it either under the terms43 #include <dt-bindings/clock/sun6i-rtc.h>44 #include <dt-bindings/clock/sun8i-de2.h>45 #include <dt-bindings/clock/sun8i-h3-ccu.h>46 #include <dt-bindings/clock/sun8i-r-ccu.h>47 #include <dt-bindings/interrupt-controller/arm-gic.h>48 #include <dt-bindings/reset/sun8i-de2.h>49 #include <dt-bindings/reset/sun8i-h3-ccu.h>50 #include <dt-bindings/reset/sun8i-r-ccu.h>53 interrupt-parent = <&gic>;[all …]
2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org>5 * This file is dual-licensed: you can use it either under the terms44 #include <dt-bindings/interrupt-controller/arm-gic.h>45 #include <dt-bindings/clock/sun6i-rtc.h>46 #include <dt-bindings/clock/sun8i-de2.h>47 #include <dt-bindings/clock/sun8i-r40-ccu.h>48 #include <dt-bindings/clock/sun8i-tcon-top.h>49 #include <dt-bindings/reset/sun8i-r40-ccu.h>50 #include <dt-bindings/reset/sun8i-de2.h>51 #include <dt-bindings/thermal/thermal.h>[all …]
5 * This file is dual-licensed: you can use it either under the terms44 #include <dt-bindings/interrupt-controller/arm-gic.h>45 #include <dt-bindings/clock/sun6i-rtc.h>46 #include <dt-bindings/clock/sun8i-v3s-ccu.h>47 #include <dt-bindings/reset/sun8i-v3s-ccu.h>48 #include <dt-bindings/clock/sun8i-de2.h>51 #address-cells = <1>;52 #size-cells = <1>;53 interrupt-parent = <&gic>;56 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)7 #include <dt-bindings/clock/suniv-ccu-f1c100s.h>8 #include <dt-bindings/reset/suniv-ccu-f1c100s.h>11 #address-cells = <1>;12 #size-cells = <1>;13 interrupt-parent = <&intc>;16 osc24M: clk-24M {17 #clock-cells = <0>;18 compatible = "fixed-clock";19 clock-frequency = <24000000>;[all …]
1 # SPDX-License-Identifier: GPL-2.02 dtb-$(CONFIG_ARCH_ALPINE) += \3 alpine-db.dtb4 dtb-$(CONFIG_MACH_ARTPEC6) += \5 artpec6-devboard.dtb6 dtb-$(CONFIG_MACH_ASM9260) += \7 alphascale-asm9260-devkit.dtb9 dtb-$(CONFIG_SOC_AT91RM9200) += \12 dtb-$(CONFIG_SOC_AT91SAM9) += \14 at91-qil_a9260.dtb \[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A31 SPI Controller10 - $ref: "spi-controller.yaml"13 - Chen-Yu Tsai <wens@csie.org>14 - Maxime Ripard <mripard@kernel.org>17 "#address-cells": true18 "#size-cells": true[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/rtc/allwinner,sun6i-a31-rtc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A31 RTC10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>14 "#clock-cells":19 - enum:20 - allwinner,sun6i-a31-rtc[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/interrupt-controller/arm-gic.h>7 #include <dt-bindings/clock/sun50i-h616-ccu.h>8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>9 #include <dt-bindings/clock/sun6i-rtc.h>10 #include <dt-bindings/reset/sun50i-h616-ccu.h>11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>14 interrupt-parent = <&gic>;15 #address-cells = <2>;16 #size-cells = <2>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)4 #include <dt-bindings/interrupt-controller/arm-gic.h>5 #include <dt-bindings/clock/sun50i-h6-ccu.h>6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>7 #include <dt-bindings/clock/sun6i-rtc.h>8 #include <dt-bindings/clock/sun8i-de2.h>9 #include <dt-bindings/clock/sun8i-tcon-top.h>10 #include <dt-bindings/reset/sun50i-h6-ccu.h>11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>12 #include <dt-bindings/reset/sun8i-de2.h>[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/sun50i-a64-ccu.h>7 #include <dt-bindings/clock/sun6i-rtc.h>8 #include <dt-bindings/clock/sun8i-de2.h>9 #include <dt-bindings/clock/sun8i-r-ccu.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/reset/sun50i-a64-ccu.h>12 #include <dt-bindings/reset/sun8i-de2.h>13 #include <dt-bindings/reset/sun8i-r-ccu.h>14 #include <dt-bindings/thermal/thermal.h>[all …]
1 # SPDX-License-Identifier: (GPL-2.0+ OR X11)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>19 - description: Allwinner A100 Perf1 Board21 - const: allwinner,a100-perf122 - const: allwinner,sun50i-a10024 - description: Allwinner A23 Evaluation Board26 - const: allwinner,sun8i-a23-evb[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * The R_INTC in Allwinner A31 and newer SoCs manages several types of7 * bit 0 bits 1-15^ bits 19-319 * +---------+ +---------+ +---------+ +---------+11 * +---------+ +---------+ +---------+ +---------+14 * +------V------+ +------------+ | | | +--V------V--+ |17 * +-------------+ +------------+ | | | +------------+ |19 * +--V-------V--+ +--V--+ | +--V--+ | +--V--+21 * | Latch | | SPI | | | SPI |... | ...| SPI |22 * +-------------+ | N+d | | | m | | | m+7 |[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * Copyright (C) 2012 - 2014 Allwinner Tech7 * Maxime Ripard <maxime.ripard@free-electrons.com>23 #include <linux/spi/spi.h>107 return readl(sspi->base_addr + reg); in sun6i_spi_read()112 writel(value, sspi->base_addr + reg); in sun6i_spi_write()145 while (len--) { in sun6i_spi_drain_fifo()146 byte = readb(sspi->base_addr + SUN6I_RXDATA_REG); in sun6i_spi_drain_fifo()147 if (sspi->rx_buf) in sun6i_spi_drain_fifo()148 *sspi->rx_buf++ = byte; in sun6i_spi_drain_fifo()[all …]
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]
