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/Linux-v5.10/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-ccu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ccu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#clock-cells":
17 "#reset-cells":
22 - allwinner,sun4i-a10-ccu
23 - allwinner,sun5i-a10s-ccu
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/Linux-v5.10/arch/arm64/boot/dts/allwinner/
Dsun50i-a64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun8i-de2.h>
8 #include <dt-bindings/clock/sun8i-r-ccu.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/reset/sun50i-a64-ccu.h>
11 #include <dt-bindings/reset/sun8i-de2.h>
12 #include <dt-bindings/reset/sun8i-r-ccu.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
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Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun8i-de2.h>
8 #include <dt-bindings/clock/sun8i-tcon-top.h>
9 #include <dt-bindings/reset/sun50i-h6-ccu.h>
10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
11 #include <dt-bindings/reset/sun8i-de2.h>
12 #include <dt-bindings/thermal/thermal.h>
[all …]
Dsun50i-a100.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ or MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-a100-ccu.h>
8 #include <dt-bindings/clock/sun50i-a100-r-ccu.h>
9 #include <dt-bindings/reset/sun50i-a100-ccu.h>
10 #include <dt-bindings/reset/sun50i-a100-r-ccu.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
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Dsun50i-a64-amarula-relic.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
7 #include "sun50i-a64.dtsi"
8 #include "sun50i-a64-cpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
13 model = "Amarula A64-Relic";
14 compatible = "amarula,a64-relic", "allwinner,sun50i-a64";
21 stdout-path = "serial0:115200n8";
25 compatible = "i2c-gpio";
26 sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>;
[all …]
/Linux-v5.10/drivers/clk/sunxi-ng/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-y += ccu_common.o
4 obj-y += ccu_mmc_timing.o
5 obj-y += ccu_reset.o
8 obj-y += ccu_div.o
9 obj-y += ccu_frac.o
10 obj-y += ccu_gate.o
11 obj-y += ccu_mux.o
12 obj-y += ccu_mult.o
13 obj-y += ccu_phase.o
[all …]
Dccu-sun8i-r.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
18 #include "ccu-sun8i-r.h"
23 { .fw_name = "pll-periph" },
59 * non-const so we can change it on the A83T.
62 static SUNXI_CCU_GATE_HWS(apb0_pio_clk, "apb0-pio",
64 static SUNXI_CCU_GATE_HWS(apb0_ir_clk, "apb0-ir",
66 static SUNXI_CCU_GATE_HWS(apb0_timer_clk, "apb0-timer",
68 static SUNXI_CCU_GATE_HWS(apb0_rsb_clk, "apb0-rsb",
70 static SUNXI_CCU_GATE_HWS(apb0_uart_clk, "apb0-uart",
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/Linux-v5.10/Documentation/devicetree/bindings/pinctrl/
Dallwinner,sun4i-a10-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#gpio-cells":
21 "#interrupt-cells":
30 - allwinner,sun4i-a10-pinctrl
31 - allwinner,sun5i-a10s-pinctrl
[all …]
/Linux-v5.10/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-sun8i.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer
11 #include <linux/mdio-mux.h>
26 /* General notes on dwmac-sun8i:
31 /* struct emac_variant - Describe dwmac-sun8i hardware variant
59 /* struct sunxi_priv_data - hold all sunxi private data
67 * @mux_handle: Internal pointer used by mdio-mux lib
87 /* EMAC clock register @ 0x164 in the CCU address range */
145 * co-packaged AC200 chip instead.
252 /* H3/A64 specific bits */
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