/Linux-v6.6/drivers/gpu/drm/msm/disp/dpu1/ |
D | dpu_hw_catalog.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved. 4 * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved. 17 * 5 ctl paths. In all cases, it can have max 12 hardware blocks 52 * SSPP sub-blocks/features 59 * @DPU_SSPP_CSC_10BIT, Support of 10-bit Color space conversion 62 * @DPU_SSPP_QOS_8LVL, SSPP support 8-level QoS control 94 * MIXER sub-blocks/features 96 * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration 112 * DSPP sub-blocks [all …]
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D | dpu_hw_catalog.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 3 * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved. 250 * SSPP sub blocks config 377 * MIXER sub blocks config 423 * DSPP sub blocks config 436 * PINGPONG sub blocks config 456 * DSC sub blocks config 469 * VBIF sub blocks config
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/Linux-v6.6/arch/arm64/crypto/ |
D | aes-modes.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * linux/arch/arm64/crypto/aes-modes.S - chaining mode wrappers for AES 5 * Copyright (C) 2013 - 2017 Linaro Ltd <ard.biesheuvel@linaro.org> 8 /* included by aes-ce.S and aes-neon.S */ 49 * int blocks) 51 * int blocks) 62 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 pt blocks */ 66 st1 {v0.16b-v3.16b}, [x0], #64 92 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 ct blocks */ 96 st1 {v0.16b-v3.16b}, [x0], #64 [all …]
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D | ghash-ce-core.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 2014 - 2018 Linaro Ltd. <ard.biesheuvel@linaro.org> 61 .arch armv8-a+crypto 149 ld1 {HH.2d-HH4.2d}, [x8] 197 // PMULL (64x64->128) based reduction for CPUs that can do 214 // 64x64->128 PMULL instruction 253 tbnz w0, #0, 2f // skip until #blocks is a 256 1: ld1 {XM3.16b-TT4.16b}, [x2], #64 258 sub w0, w0, #4 320 sub w0, w0, #1 [all …]
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/Linux-v6.6/include/linux/mfd/ |
D | rohm-bd957x.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 17 * The BD9576 has own IRQ 'blocks' for: 18 * - I2C/thermal, 19 * - Over voltage protection 20 * - Short-circuit protection 21 * - Over current protection 22 * - Over voltage detection 23 * - Under voltage detection 24 * - Under voltage protection 25 * - 'system interrupt'. [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/interconnect/ |
D | samsung,exynos-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 15 sub-blocks in SoC. Most Exynos SoCs share the common architecture for buses. 20 sub-blocks. 22 The Exynos SoC includes the various sub-blocks which have the each AXI bus. 24 line. The power line might be shared among one more sub-blocks. So, we can [all …]
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/Linux-v6.6/fs/xfs/scrub/ |
D | bitmap.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (C) 2018-2023 Oracle. All Rights Reserved. 34 #define START(node) ((node)->bn_start) 35 #define LAST(node) ((node)->bn_last) 39 * forward-declare them anyway for clarity. 60 for ((bn) = rb_entry_safe(rb_first(&(bitmap)->xb_root.rb_root), \ in INTERVAL_TREE_DEFINE() 63 (bn) = rb_entry_safe(rb_next(&(bn)->bn_rbnode), \ 75 uint64_t last = start + len - 1; 77 while ((bn = xbitmap_tree_iter_first(&bitmap->xb_root, start, last))) { 78 if (bn->bn_start < start && bn->bn_last > last) { [all …]
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D | reap.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (C) 2022-2023 Oracle. All Rights Reserved. 42 * Disposal of Blocks from Old Metadata 45 * to dispose of the blocks that (we think) the old btree was using. 48 * blocks with the same rmap owner that are owned by another data structure 50 * remaining in bitmap are the old btree's blocks. 53 * blocks on disk. The rmap data can tell us if there are multiple owners, so 60 * will be rebuilt (atop different blocks), thereby removing all the cross 122 error = xfs_rmap_alloc(sc->tp, sc->sa.agf_bp, sc->sa.pag, agbno, 1, in xreap_put_freelist() 128 error = xfs_alloc_read_agfl(sc->sa.pag, sc->tp, &agfl_bp); in xreap_put_freelist() [all …]
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/Linux-v6.6/lib/zstd/compress/ |
D | zstd_compress_superblock.c | 5 * This source code is licensed under both the BSD-style license (found in the 8 * You may select, at your option, one of the above-listed licenses. 11 /*-************************************* 23 * Compresses literals section for a sub-block. 32 * hufMetadata->hType has literals block type info. 33 * If it is set_basic, all sub-blocks literals section will be Raw_Literals_Block. 34 * If it is set_rle, all sub-blocks literals section will be RLE_Literals_Block. 35 …* If it is set_compressed, first sub-block's literals section will be Compressed_Literals_Blo… 36 * If it is set_compressed, first sub-block's literals section will be Treeless_Literals_Block 37 * and the following sub-blocks' literals sections will be Treeless_Literals_Block. [all …]
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/Linux-v6.6/arch/arm/crypto/ |
D | aes-neonbs-core.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 11 * 'Faster and Timing-Attack Resistant AES-GCM' by Emilia Kaesper and 15 * for 32-bit ARM written by Andy Polyakov <appro@openssl.org> 262 vld1.8 {\t0-\t1}, [bskey, :256]! 264 vld1.8 {\t2-\t3}, [bskey, :256]! 269 vld1.8 {\t0-\t1}, [bskey, :256]! 273 vld1.8 {\t2-\t3}, [bskey, :256]! 354 vld1.8 {\t0-\t1}, [bskey, :256]! 356 vld1.8 {\t2-\t3}, [bskey, :256]! 358 vld1.8 {\t4-\t5}, [bskey, :256]! [all …]
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D | aes-ce-core.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * aes-ce-core.S - AES in CBC/CTR/XTS mode using ARMv8 Crypto Extensions 12 .arch armv8-a 13 .fpu crypto-neon-fp-armv8 102 vld1.32 {q10-q11}, [ip]! 104 vld1.32 {q12-q13}, [ip]! 106 vld1.32 {q10-q11}, [ip]! 108 vld1.32 {q12-q13}, [ip]! 110 blo 0f @ AES-128: 10 rounds 111 vld1.32 {q10-q11}, [ip]! [all …]
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/Linux-v6.6/Documentation/filesystems/ |
D | zonefs.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 ZoneFS - Zone filesystem for Zoned block devices 11 as a file. Unlike a regular POSIX-compliant file system with native zoned block 18 than to a full-featured POSIX file system. The goal of zonefs is to simplify 22 example of this approach is the implementation of LSM (log-structured merge) 31 ------------------- 62 by sub-directories. This file structure is built entirely using zone information 63 provided by the device and so does not require any complex on-disk metadata 66 On-disk metadata 67 ---------------- [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/reset/ |
D | reset.txt | 8 Hardware blocks typically receive a reset signal. This signal is generated by 10 reset consumer (the module being reset, or a module managing when a sub- 15 specifier - a list of DT cells that represents the reset signal within the 21 in hardware for a reset signal to affect multiple logically separate HW blocks 35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes 41 rst: reset-controller { 42 #reset-cells = <1>; 51 #reset-cells, then only the phandle portion of the pair will 55 reset-names: List of reset signal name strings sorted in the same order as 56 the resets property. Consumers drivers will use reset-names to [all …]
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/Linux-v6.6/Documentation/driver-api/media/ |
D | v4l2-intro.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 ------------ 8 /dev, and create also non-V4L2 devices such as DVB, ALSA, FB, I2C and input 15 called 'sub-devices'. 22 connecting to sub-devices themselves. Some of this is quite complicated 28 So this framework sets up the basic building blocks that all drivers 32 A good example to look at as a reference is the v4l2-pci-skeleton.c 38 ------------------------- 44 2) A way of initializing and commanding sub-devices (if any). 47 and keeping track of device-node specific data. [all …]
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/Linux-v6.6/Documentation/admin-guide/media/ |
D | ipu3.rst | 1 .. SPDX-License-Identifier: GPL-2.0 24 ImgU). The CIO2 driver is available as drivers/media/pci/intel/ipu3/ipu3-cio2* 36 Both of the drivers implement V4L2, Media Controller and V4L2 sub-device 38 MIPI CSI-2 interfaces through V4L2 sub-device sensor drivers. 44 interface to the user space. There is a video node for each CSI-2 receiver, 47 The CIO2 contains four independent capture channel, each with its own MIPI CSI-2 48 receiver and DMA engine. Each channel is modelled as a V4L2 sub-device exposed 49 to userspace as a V4L2 sub-device node and has two pads: 53 .. flat-table:: 54 :header-rows: 1 [all …]
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D | qcom_camss.rst | 1 .. SPDX-License-Identifier: GPL-2.0 9 ------------ 25 ---------------------------------- 30 - 2 / 3 CSIPHY modules. They handle the Physical layer of the CSI2 receivers. 32 - 2 / 4 CSID (CSI Decoder) modules. They handle the Protocol and Application 36 - ISPIF (ISP Interface) module. Handles the routing of the data streams from 38 - 1 / 2 VFE (Video Front End) module(s). Contain a pipeline of image processing 39 hardware blocks. The VFE has different input interfaces. The PIX (Pixel) input 48 ----------------------- 52 - Input from camera sensor via CSIPHY; [all …]
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/Linux-v6.6/Documentation/devicetree/bindings/sound/ |
D | st,stm32-sai.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Olivier Moysan <olivier.moysan@foss.st.com> 14 protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97. 15 The SAI contains two independent audio sub-blocks. Each sub-block has 21 - st,stm32f4-sai 22 - st,stm32h7-sai 26 - description: Base address and size of SAI common register set. [all …]
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/Linux-v6.6/drivers/gpu/drm/msm/ |
D | NOTES | 4 display controller blocks at play: 5 + MDP3 - ?? seems to be what is on geeksphone peak device 6 + MDP4 - S3 (APQ8060, touchpad), S4-pro (APQ8064, nexus4 & ifc6410) 7 + MDP5 - snapdragon 800 12 Plus a handful of blocks around them for HDMI/DSI/etc output. 18 But, HDMI/DSI/etc blocks seem like they can be shared across multiple 19 display controller blocks. And I for sure don't want to have to deal 20 with N different kms devices from xf86-video-freedreno. Plus, it 27 And one or more 'struct msm_gpu' for the various different gpu sub- 38 plane -> PIPE{RGBn,VGn} \ [all …]
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/Linux-v6.6/arch/x86/crypto/ |
D | chacha-avx512vl-x86_64.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * ChaCha 256-bit cipher algorithm, x64 AVX-512VL functions 29 # %rsi: up to 2 data blocks output, o 30 # %rdx: up to 2 data blocks input, i 34 # This function encrypts two ChaCha blocks by loading the state 41 # x0..3[0-2] = s0..3 110 sub $2,%r8d 181 sub $1,%rax 194 # %rsi: up to 4 data blocks output, o 195 # %rdx: up to 4 data blocks input, i [all …]
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D | aesni-intel_asm.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * Implement AES algorithm in Intel AES-NI instructions. 5 * The white paper of AES-NI instructions can be downloaded from: 6 * http://softwarecommunity.intel.com/isn/downloads/intelavx/AES-Instructions-Set_WP.pdf 13 * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD 14 * interface for 64-bit kernels. 30 #include <asm/nospec-branch.h> 248 # Clobbers rax, r10-r13 and xmm0-xmm6, %xmm13 274 # Clobbers rax, r10-r13, and xmm0-xmm15 283 sub %r11, %arg5 # sub partial block data used [all …]
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D | sha1_avx2_x86_64_asm.S | 2 * Implement fast SHA-1 with AVX2 instructions. (x86_64) 59 * SHA-1 implementation with Intel(R) AVX2 instruction set extensions. 62 *Visit http://software.intel.com/en-us/articles/ 63 *and refer to improving-the-performance-of-the-secure-hash-algorithm-1/ 65 *Updates 20-byte SHA-1 record at start of 'state', from 'input', for 66 *even number of 'blocks' consecutive 64-byte blocks. 69 * struct sha1_state *state, const u8* input, int blocks ); 146 * - 80 DWORDs per iteration * 2 201 /* message scheduling pre-compute for rounds 0-15 */ 209 vinsertf128 $1, ((i-1) * 2)(BUFFER_PTR2),\ [all …]
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D | aesni-intel_avx-x86_64.S | 48 ## Vinodh Gopal et. al. Optimized Galois-Counter-Mode Implementation 51 ## Erdinc Ozturk et. al. Enabling High-Performance Galois-Counter-Mode 61 ## +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 63 ## +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 66 ## +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 68 ## +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 82 ## +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 84 ## +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ 85 ## | 32-bit Sequence Number (A0) | 86 ## +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ [all …]
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/Linux-v6.6/Documentation/filesystems/ext4/ |
D | inodes.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 ----------- 15 links and is in general more seek-happy than ext4 due to its simpler 19 sized to have enough blocks to store at least 22 ``(inode_number - 1) / sb.s_inodes_per_group``, and the offset into the 23 group's table is ``(inode_number - 1) % sb.s_inodes_per_group``. There 31 .. list-table:: 33 :header-rows: 1 36 * - Offset 37 - Size [all …]
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/Linux-v6.6/drivers/accel/habanalabs/common/ |
D | security.h | 1 /* SPDX-License-Identifier: GPL-2.0 3 * Copyright 2016-2022 HabanaLabs, Ltd. 11 #include <linux/io-64-nonatomic-lo-hi.h> 15 /* special blocks */ 24 * struct hl_special_block_info - stores address details of a particular type of 30 * @major: number of major blocks of particular type. 31 * @minor: number of minor blocks of particular type. 32 * @sub_minor: number of sub minor blocks of particular type. 33 * @major_offset: address gap between 2 consecutive major blocks of particular type, 35 * @minor_offset: address gap between 2 consecutive minor blocks of particular type, [all …]
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/Linux-v6.6/Documentation/userspace-api/media/ |
D | glossary.rst | 1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later 51 **Field-programmable Gate Array** 56 See https://en.wikipedia.org/wiki/Field-programmable_gate_array. 65 together make a larger user-facing functional peripheral. For 73 **Inter-Integrated Circuit** 75 A multi-master, multi-slave, packet switched, single-ended, 77 like sub-device hardware components. 79 See http://www.nxp.com/docs/en/user-guide/UM10204.pdf. 95 IP Blocks may be licensed to another party or can be owned 113 - :term:`CEC API`; [all …]
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