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/Linux-v5.15/kernel/
Dstacktrace.c75 unsigned long *store; member
92 c->store[c->len++] = addr; in stack_trace_consume_entry()
105 * @store: Pointer to storage array
111 unsigned int stack_trace_save(unsigned long *store, unsigned int size, in stack_trace_save() argument
116 .store = store, in stack_trace_save()
129 * @store: Pointer to storage array
135 unsigned int stack_trace_save_tsk(struct task_struct *tsk, unsigned long *store, in stack_trace_save_tsk() argument
140 .store = store, in stack_trace_save_tsk()
157 * @store: Pointer to storage array
163 unsigned int stack_trace_save_regs(struct pt_regs *regs, unsigned long *store, in stack_trace_save_regs() argument
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/Linux-v5.15/drivers/md/
Ddm-snap-transient.c8 #include "dm-exception-store.h"
20 * Implementation of the store for non-persistent snapshots.
26 static void transient_dtr(struct dm_exception_store *store) in transient_dtr() argument
28 kfree(store->context); in transient_dtr()
31 static int transient_read_metadata(struct dm_exception_store *store, in transient_read_metadata() argument
39 static int transient_prepare_exception(struct dm_exception_store *store, in transient_prepare_exception() argument
42 struct transient_c *tc = store->context; in transient_prepare_exception()
43 sector_t size = get_dev_size(dm_snap_cow(store->snap)->bdev); in transient_prepare_exception()
45 if (size < (tc->next_free + store->chunk_size)) in transient_prepare_exception()
48 e->new_chunk = sector_to_chunk(store, tc->next_free); in transient_prepare_exception()
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Ddm-exception-store.c8 #include "dm-exception-store.h"
64 * 'dm-exception-store-<type_name>' is too long of a name in my
66 * containing exception store implementations be 'dm-exstore-<type_name>'.
142 static int set_chunk_size(struct dm_exception_store *store, in set_chunk_size() argument
153 store->chunk_size = store->chunk_mask = store->chunk_shift = 0; in set_chunk_size()
157 return dm_exception_store_set_chunk_size(store, chunk_size, error); in set_chunk_size()
160 int dm_exception_store_set_chunk_size(struct dm_exception_store *store, in dm_exception_store_set_chunk_size() argument
172 (bdev_logical_block_size(dm_snap_cow(store->snap)->bdev) >> 9) || in dm_exception_store_set_chunk_size()
174 (bdev_logical_block_size(dm_snap_origin(store->snap)->bdev) >> 9)) { in dm_exception_store_set_chunk_size()
184 store->chunk_size = chunk_size; in dm_exception_store_set_chunk_size()
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Ddm-snap-persistent.c8 #include "dm-exception-store.h"
30 * We need to store a record of which parts of the origin have
33 * of the COW store. It makes sense therefore, to store the
100 * The top level structure for a persistent exception store.
103 struct dm_exception_store *store; member
139 * the exception store because chunks can be committed out of
172 len = ps->store->chunk_size << SECTOR_SHIFT; in alloc_area()
233 .bdev = dm_snap_cow(ps->store->snap)->bdev, in chunk_io()
234 .sector = ps->store->chunk_size * chunk, in chunk_io()
235 .count = ps->store->chunk_size, in chunk_io()
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Ddm-exception-store.h5 * Device-mapper snapshot exception store.
46 int (*ctr) (struct dm_exception_store *store, char *options);
51 void (*dtr) (struct dm_exception_store *store);
58 int (*read_metadata) (struct dm_exception_store *store,
64 * Find somewhere to store the next exception.
66 int (*prepare_exception) (struct dm_exception_store *store,
72 void (*commit_exception) (struct dm_exception_store *store,
78 * Returns 0 if the exception store is empty.
85 int (*prepare_merge) (struct dm_exception_store *store,
92 int (*commit_merge) (struct dm_exception_store *store, int nr_merged);
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/Linux-v5.15/arch/sparc/lib/
DM7memcpy.S48 * load words, shift half words, store words; branch to finish_up
50 * load words, shift 3 bytes, store words; branch to finish_up
52 * load words, shift 1 byte, store words; branch to finish_up
65 * Use BIS (block initializing store) to avoid copying store cache
66 * lines from memory. But pre-store first element of each cache line
83 * loadx8, falign, block-store, prefetch loop
84 * (only use block-init-store when src/dst on 8 byte boundaries.)
120 #ifndef STORE
121 #define STORE(type,src,addr) type src, [addr] macro
128 * between the first initializing store and the final stores.
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Dcsum_copy.S31 #ifndef STORE
32 #define STORE(type,src,addr) type src, [addr] macro
53 EX_ST(STORE(stb, %o4, %o1 + 0x00))
63 EX_ST(STORE(sth, %o5, %o1 + 0x00))
112 EX_ST(STORE(stw, %o5, %o1 + 0x00))
115 EX_ST(STORE(stw, %g1, %o1 + 0x04))
118 EX_ST(STORE(stw, %g2, %o1 + 0x08))
121 EX_ST(STORE(stw, %o5, %o1 + 0x0c))
124 EX_ST(STORE(stw, %g1, %o1 + 0x10))
127 EX_ST(STORE(stw, %g2, %o1 + 0x14))
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DNG4memcpy.S69 #ifndef STORE
71 #define STORE(type,src,addr) type src, [addr] macro
73 #define STORE(type,src,addr) type##a src, [addr] %asi macro
135 EX_ST(STORE(stb, %g2, %o0 - 0x01), memcpy_retl_o2_plus_g1_plus_1)
165 EX_ST(STORE(stx, %g2, %o0 - 0x08), memcpy_retl_o2_plus_g1_plus_8)
241 EX_ST_FP(STORE(std, %f16, %o0 + 0x00), memcpy_retl_o2_plus_o4_plus_64)
242 EX_ST_FP(STORE(std, %f18, %o0 + 0x08), memcpy_retl_o2_plus_o4_plus_56)
243 EX_ST_FP(STORE(std, %f20, %o0 + 0x10), memcpy_retl_o2_plus_o4_plus_48)
244 EX_ST_FP(STORE(std, %f22, %o0 + 0x18), memcpy_retl_o2_plus_o4_plus_40)
245 EX_ST_FP(STORE(std, %f24, %o0 + 0x20), memcpy_retl_o2_plus_o4_plus_32)
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Dmemset.S30 #define STORE(source, base, offset, n) \ macro
48 * Store 64 bytes at (BASE + OFFSET) using value SOURCE. */
50 STORE(source, base, offset, 0x00); \
51 STORE(source, base, offset, 0x08); \
52 STORE(source, base, offset, 0x10); \
53 STORE(source, base, offset, 0x18); \
54 STORE(source, base, offset, 0x20); \
55 STORE(source, base, offset, 0x28); \
56 STORE(source, base, offset, 0x30); \
57 STORE(source, base, offset, 0x38);
DM7memset.S35 * Then store as many 4-byte chunks, followed by trailing bytes.
39 * store 8-bytes chunks to align the address on 64 byte boundary
56 * store remaining data in 64-byte chunks until less than
59 * Store as many 8-byte chunks, followed by trailing bytes.
61 * BIS = Block Init Store
62 * Doing the advance store of the first element of the cache line
72 * the BIS store must be balanced against the cost of the membar operation.
79 * store and the final stores.
81 * "most recently used" for all but the last store to the cache line.
166 ! Store -(%o3) bytes till dst is block (64 byte) aligned.
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/Linux-v5.15/tools/perf/ui/gtk/
Dhists.c97 static void perf_gtk__add_callchain_flat(struct rb_root *root, GtkTreeStore *store, in perf_gtk__add_callchain_flat() argument
119 gtk_tree_store_append(store, &iter, &new_parent); in perf_gtk__add_callchain_flat()
122 gtk_tree_store_set(store, &iter, 0, buf, -1); in perf_gtk__add_callchain_flat()
125 gtk_tree_store_set(store, &iter, col, buf, -1); in perf_gtk__add_callchain_flat()
140 gtk_tree_store_append(store, &iter, &new_parent); in perf_gtk__add_callchain_flat()
143 gtk_tree_store_set(store, &iter, 0, buf, -1); in perf_gtk__add_callchain_flat()
146 gtk_tree_store_set(store, &iter, col, buf, -1); in perf_gtk__add_callchain_flat()
160 static void perf_gtk__add_callchain_folded(struct rb_root *root, GtkTreeStore *store, in perf_gtk__add_callchain_folded() argument
209 gtk_tree_store_append(store, &iter, parent); in perf_gtk__add_callchain_folded()
212 gtk_tree_store_set(store, &iter, 0, buf, -1); in perf_gtk__add_callchain_folded()
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/Linux-v5.15/arch/mips/cavium-octeon/
Docteon-memcpy.S89 #define STORE sd macro
192 EXC( STORE t0, UNIT(0)(dst), s_exc_p16u)
193 EXC( STORE t1, UNIT(1)(dst), s_exc_p15u)
194 EXC( STORE t2, UNIT(2)(dst), s_exc_p14u)
195 EXC( STORE t3, UNIT(3)(dst), s_exc_p13u)
200 EXC( STORE t0, UNIT(4)(dst), s_exc_p12u)
201 EXC( STORE t1, UNIT(5)(dst), s_exc_p11u)
202 EXC( STORE t2, UNIT(6)(dst), s_exc_p10u)
204 EXC( STORE t3, UNIT(7)(dst), s_exc_p9u)
210 EXC( STORE t0, UNIT(-8)(dst), s_exc_p8u)
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/Linux-v5.15/net/netfilter/ipset/
DKconfig33 can store IPv4 addresses (or network addresse) from a range.
42 can store IPv4 address and (source) MAC address pairs from a range.
51 can store TCP/UDP port numbers from a range.
60 can store arbitrary IPv4 or IPv6 addresses (or network addresses)
70 can store IPv4/IPv6 address and mark pairs.
79 can store IPv4/IPv6 address and protocol/port pairs.
88 one can store IPv4/IPv6 address, protocol/port, and IPv4/IPv6
98 one can store IPv4/IPv6 address, protocol/port, and IPv4/IPv6
108 one can store IPv4/IPv6 address and MAC (ethernet address) pairs in a set.
117 one can store MAC (ethernet address) elements in a set.
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/Linux-v5.15/tools/memory-model/Documentation/
Dexplanation.txt85 store instruction accessing the same location (we ignore complicating
168 store to buf but before the store to flag. In this case, r1 and r2
190 store to the same memory location, from any CPU.
196 Since r1 = 1, P0 must store 1 to flag before P1 loads 1 from
204 store to the same address.
209 Since an instruction (in this case, P0's store to flag) cannot
218 x86 and SPARC follow yet a different memory model: TSO (Total Store
221 Consistency. One example is the Store Buffer (SB) pattern, in which
318 is concerned only with the store itself -- its value and its address
385 both branches of an "if" statement store the same value to the same
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Dglossary.txt35 When an acquire load returns the value stored by a release store
37 from" the release store), then all operations preceding that
38 store "happen before" any operations following that load acquire.
42 Coherence (co): When one CPU's store to a given variable overwrites
43 either the value from another CPU's store or some later value,
54 Control Dependency: When a later store's execution depends on a test
56 a "control dependency" extends from that load to that store.
88 Data Dependency: When the data written by a later store is computed based
90 extends from that load to that later store. For example:
105 From-Reads (fr): When one CPU's store to a given variable happened
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Drecipes.txt42 from or store to only part of the variable.
45 use READ_ONCE() and WRITE_ONCE() or stronger to prevent load/store
46 tearing, load/store fusing, and invented loads and stores.
195 load buffering, release-acquire chains, store buffering.
206 outcome in which the first load sees the value written by the second store
207 but the second load does not see the value written by the first store.
233 store, while the smp_load_acquire macro orders the load against any
276 (address dependency, as shown above), the value written by a later store
277 (data dependency), or whether or not a later store is executed in the
336 * STORE $data LOAD $data
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Dcontrol-dependencies.txt32 (usually) guaranteed for load-store control dependencies, as in the
43 the compiler might fuse the store to "b" with other stores. Worse yet,
44 the compiler might convert the store into a load and a check followed
45 by a store, and this compiler-generated load would not be ordered by
87 Now there is no conditional between the load from "a" and the store to
142 between the load from variable "a" and the store to variable "b". It is
149 BUILD_BUG_ON(MAX <= 1); /* Order load from a with store to b. */
159 must store different values to "b". As in previous examples, if the two
160 values were identical, the compiler could pull this store outside of the
209 instructions and the store depending on them. This means that a weakly
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/Linux-v5.15/tools/testing/selftests/powerpc/ptrace/
Dptrace-vsx.h67 * unsigned long store[128]
70 int compare_vsx_vmx(unsigned long *store, unsigned long *load) in compare_vsx_vmx() argument
75 if (store[1 + 2 * i] != load[1 + 2 * i]) { in compare_vsx_vmx()
76 printf("store[%d]: %lx load[%d] %lx\n", in compare_vsx_vmx()
77 1 + 2 * i, store[i], in compare_vsx_vmx()
85 if (store[i] != load[i]) { in compare_vsx_vmx()
86 printf("store[%d]: %lx load[%d] %lx\n", in compare_vsx_vmx()
87 i, store[i], i, load[i]); in compare_vsx_vmx()
93 if (!(i % 2) && (store[i] != load[i+1])) { in compare_vsx_vmx()
94 printf("store[%d]: %lx load[%d] %lx\n", in compare_vsx_vmx()
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/Linux-v5.15/sound/usb/
Dmixer_us16x08.c358 /* gets a current mixer value from common store */
421 struct snd_us16x08_comp_store *store = elem->private_data; in snd_us16x08_comp_get() local
425 ucontrol->value.integer.value[0] = store->val[val_idx][index]; in snd_us16x08_comp_get()
435 struct snd_us16x08_comp_store *store = elem->private_data; in snd_us16x08_comp_put() local
451 store->val[val_idx][index] = ucontrol->value.integer.value[0]; in snd_us16x08_comp_put()
457 buf[8] = store->val[ in snd_us16x08_comp_put()
460 buf[11] = ratio_map[store->val[ in snd_us16x08_comp_put()
462 buf[14] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][index] in snd_us16x08_comp_put()
464 buf[17] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][index] in snd_us16x08_comp_put()
466 buf[20] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][index]; in snd_us16x08_comp_put()
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/Linux-v5.15/drivers/s390/char/
Dsclp_sd.c3 * SCLP Store Data support and sysfs interface
53 * struct sclp_sd_data - Result of a Store Data request
65 * struct sclp_sd_listener - Listener for asynchronous Store Data response
69 * @evbuf: Contains the resulting Store Data response after completion
79 * struct sclp_sd_file - Sysfs representation of a Store Data entity
102 * sclp_sd_listener_add() - Add listener for Store Data responses
113 * sclp_sd_listener_remove() - Remove listener for Store Data responses
124 * sclp_sd_listener_init() - Initialize a Store Data response listener
127 * Initialize a listener for asynchronous Store Data responses. This listener
139 * sclp_sd_receiver() - Receiver for Store Data events
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/Linux-v5.15/drivers/acpi/acpica/
Dexstore.c4 * Module Name: exstore - AML Interpreter object store support
36 * *dest_desc - Where to store it. Must be an NS node
43 * DESCRIPTION: Store the value described by source_desc into the location
45 * functions to store the result of an operation into
46 * the destination operand -- not just simply the actual "Store"
116 * 1) Store to Name (Change the object associated with a name) in acpi_ex_store()
117 * 2) Store to an indexed area of a Buffer or Package in acpi_ex_store()
118 * 3) Store to a Method Local or Arg in acpi_ex_store()
119 * 4) Store to the debug object in acpi_ex_store()
144 /* Store to a method local/arg */ in acpi_ex_store()
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/Linux-v5.15/drivers/gpu/drm/amd/display/dc/gpio/
Dhw_gpio.c45 REG_GET(MASK_reg, MASK, &gpio->store.mask); in store_registers()
46 REG_GET(A_reg, A, &gpio->store.a); in store_registers()
47 REG_GET(EN_reg, EN, &gpio->store.en); in store_registers()
48 /* TODO store GPIO_MUX_CONTROL if we ever use it */ in store_registers()
54 REG_UPDATE(MASK_reg, MASK, gpio->store.mask); in restore_registers()
55 REG_UPDATE(A_reg, A, gpio->store.a); in restore_registers()
56 REG_UPDATE(EN_reg, EN, gpio->store.en); in restore_registers()
191 pin->store.mask = 0; in dal_hw_gpio_construct()
192 pin->store.a = 0; in dal_hw_gpio_construct()
193 pin->store.en = 0; in dal_hw_gpio_construct()
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/Linux-v5.15/Documentation/
Dmemory-barriers.txt159 STORE A=3, STORE B=4, y=LOAD A->3, x=LOAD B->4
160 STORE A=3, STORE B=4, x=LOAD B->4, y=LOAD A->3
161 STORE A=3, y=LOAD A->3, STORE B=4, x=LOAD B->4
162 STORE A=3, y=LOAD A->3, x=LOAD B->2, STORE B=4
163 STORE A=3, x=LOAD B->2, STORE B=4, y=LOAD A->3
164 STORE A=3, x=LOAD B->2, y=LOAD A->3, STORE B=4
165 STORE B=4, STORE A=3, y=LOAD A->3, x=LOAD B->4
166 STORE B=4, ...
217 STORE *A = 5, x = LOAD *D
218 x = LOAD *D, STORE *A = 5
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/Linux-v5.15/drivers/clk/ti/
Dclk-3xxx.c46 * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
47 * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
48 * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
76 * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
77 * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
78 * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
116 * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
117 * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into
118 * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator
147 * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into
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/Linux-v5.15/arch/sh/kernel/cpu/sh4/
Dsq.c5 * General management API for SH-4 integrated Store Queues
51 * @start: the store queue address to start flushing from
54 * Flushes the store queue cache from @start to @start + @len in a
133 * sq_remap - Map a physical address through the Store Queues
139 * Remaps the physical address @phys through the next available store queue
200 * sq_unmap - Unmap a Store Queue allocation
201 * @vaddr: Pre-allocated Store Queue mapping.
203 * Unmaps the store queue allocation @map that was previously created by
217 printk("%s: bad store queue address 0x%08lx\n", in sq_unmap()
253 * Some day we may want to have an additional abstraction per store
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