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/Linux-v5.15/Documentation/devicetree/bindings/net/can/
Dfsl,flexcan.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 Flexcan CAN controller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
11 - Marc Kleine-Budde <mkl@pengutronix.de>
14 - $ref: can-controller.yaml#
19 - enum:
20 - fsl,imx8qm-flexcan
21 - fsl,imx8mp-flexcan
22 - fsl,imx6q-flexcan
[all …]
/Linux-v5.15/drivers/gpu/drm/sti/
Dsti_vtg.c1 // SPDX-License-Identifier: GPL-2.0
74 #define AWG_DELAY_HD (-9)
75 #define AWG_DELAY_ED (-8)
76 #define AWG_DELAY_SD (-7)
156 writel(1, vtg->regs + VTG_DRST_AUTOC); in vtg_reset()
160 const struct drm_display_mode *mode) in vtg_set_output_window() argument
166 u32 xstart = sti_vtg_get_pixel_number(*mode, 0); in vtg_set_output_window()
167 u32 ystart = sti_vtg_get_line_number(*mode, 0); in vtg_set_output_window()
168 u32 xstop = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1); in vtg_set_output_window()
169 u32 ystop = sti_vtg_get_line_number(*mode, mode->vdisplay - 1); in vtg_set_output_window()
[all …]
/Linux-v5.15/arch/arm/mach-imx/
Dcommon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
50 STOP_POWER_ON, /* just STOP */
51 STOP_POWER_OFF, /* STOP + SRPG */
55 ULP_PM_HSRUN, /* High speed run mode */
56 ULP_PM_RUN, /* Run mode */
57 ULP_PM_WAIT, /* Wait mode */
58 ULP_PM_STOP, /* Stop mode */
59 ULP_PM_VLPS, /* Very low power stop mode */
60 ULP_PM_VLLS, /* very low leakage stop mode */
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/net/
Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
/Linux-v5.15/arch/mips/include/uapi/asm/
Dtermbits.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
26 tcflag_t c_iflag; /* input mode flags */
27 tcflag_t c_oflag; /* output mode flags */
28 tcflag_t c_cflag; /* control mode flags */
29 tcflag_t c_lflag; /* local mode flags */
35 tcflag_t c_iflag; /* input mode flags */
36 tcflag_t c_oflag; /* output mode flags */
37 tcflag_t c_cflag; /* control mode flags */
38 tcflag_t c_lflag; /* local mode flags */
46 tcflag_t c_iflag; /* input mode flags */
[all …]
/Linux-v5.15/drivers/i2c/busses/
Di2c-uniphier-f.c1 // SPDX-License-Identifier: GPL-2.0-or-later
15 #define UNIPHIER_FI2C_CR_MST BIT(3) /* master mode */
17 #define UNIPHIER_FI2C_CR_STO BIT(1) /* stop condition */
26 #define UNIPHIER_FI2C_SSUT 0x18 /* restart/stop setup time control */
33 #define UNIPHIER_FI2C_INT_TC BIT(7) /* send complete (STOP) */
34 #define UNIPHIER_FI2C_INT_RC BIT(6) /* receive complete (STOP) */
41 #define UNIPHIER_FI2C_SR_STS BIT(11) /* stop condition detected */
99 * TX-FIFO stores slave address in it for the first access. in uniphier_fi2c_fill_txfifo()
103 fifo_space--; in uniphier_fi2c_fill_txfifo()
105 while (priv->len) { in uniphier_fi2c_fill_txfifo()
[all …]
Di2c-img-scb.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * - Raw control of the SDA and SCK signals.
15 * - Atomic commands. A low level I2C symbol (such as generate
16 * start/stop/ack/nack bit, generate byte, receive byte, and receive
20 * This mode of operation is used by MODE_ATOMIC, which uses an I2C
22 * transactions using atomic mode commands, and also by MODE_SEQUENCE,
23 * which emits a simple fixed sequence of atomic mode commands.
29 * - Automatic mode. A bus address, and whether to read/write is
38 * Use of automatic mode and the FIFO can make much more efficient use
44 * the bus), MODE_ATOMIC must be used since automatic mode is normally
[all …]
Di2c-pxa.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Copyright (C) 2004-2005 Deep Blue Solutions Ltd.
13 * Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
14 * Jan 2003: added limited signal handling [Kai-Uwe Bloem]
17 * Feb 2005: Rework slave mode handling [RMK]
34 #include <linux/platform_data/i2c-pxa.h>
42 #define ICR_STOP (1 << 1) /* stop bit */
52 #define ICR_SSDIE (1 << 11) /* slave STOP detected int enable */
56 #define ICR_FM (1 << 15) /* fast mode */
57 #define ICR_HS (1 << 16) /* High Speed mode */
[all …]
Di2c-emev2.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015 Wolfram Sang <wsa@sang-engineering.com>
7 * Copyright 2010-2015 Renesas Electronics Corporation
77 writeb((readb(priv->base + reg) & ~clear) | set, priv->base + reg); in em_clear_set_bit()
85 reinit_completion(&priv->msg_done); in em_i2c_wait_for_event()
87 time_left = wait_for_completion_timeout(&priv->msg_done, priv->adap.timeout); in em_i2c_wait_for_event()
90 return -ETIMEDOUT; in em_i2c_wait_for_event()
92 status = readb(priv->base + I2C_OFS_IICSE0); in em_i2c_wait_for_event()
93 return status & I2C_BIT_ALD0 ? -EAGAIN : status; in em_i2c_wait_for_event()
98 /* Send Stop condition */ in em_i2c_stop()
[all …]
Di2c-pnx.c7 * 2004-2006 (c) MontaVista Software, Inc. This file is licensed under
33 int mode; /* Interface mode */ member
84 #define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */
85 #define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */
86 #define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */
87 #define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */
88 #define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */
89 #define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */
90 #define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */
91 #define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */
[all …]
Di2c-nomadik.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2009 ST-Ericsson SA
6 * I2C master mode controller driver, used in Nomadik 8815
25 #define DRIVER_NAME "nmk-i2c"
46 #define I2C_CR_OM (0x3 << 1) /* Operating mode */
47 #define I2C_CR_SAM (0x1 << 3) /* Slave addressing mode */
48 #define I2C_CR_SM (0x3 << 4) /* Speed mode */
49 #define I2C_CR_SGCM (0x1 << 6) /* Slave general call mode */
55 #define I2C_CR_LM (0x1 << 12) /* Loopback mode */
57 #define I2C_CR_FS (0x3 << 15) /* Force stop enable */
[all …]
Di2c-stm32f4.c1 // SPDX-License-Identifier: GPL-2.0
13 * This driver is based on i2c-st.c
31 #include "i2c-stm32.h"
97 * struct stm32f4_i2c_msg - client specific data
98 * @addr: 8-bit slave addr, including r/w bit
102 * @stop: last I2C msg to be sent, i.e. STOP to be generated
109 bool stop; member
113 * struct stm32f4_i2c_dev - private data of the controller
146 void __iomem *reg = i2c_dev->base + STM32F4_I2C_CR2; in stm32f4_i2c_disable_irq()
156 i2c_dev->parent_rate = clk_get_rate(i2c_dev->clk); in stm32f4_i2c_set_periph_clk_freq()
[all …]
/Linux-v5.15/include/linux/
Dptrace.h1 /* SPDX-License-Identifier: GPL-2.0 */
26 * The owner ship rules for task->ptrace which holds the ptrace
27 * flags is simple. When a task is running it owns it's task->ptrace
28 * flags. When the a task is stopped the ptracer owns task->ptrace.
50 /* single stepping state bits (used on ARM and PA-RISC) */
82 * ptrace_may_access - check whether the caller is permitted to access
85 * @mode: selects type of access and caller credentials
90 * be set in @mode to specify whether the access was requested through
95 extern bool ptrace_may_access(struct task_struct *task, unsigned int mode);
99 return !same_thread_group(child->real_parent, child->parent); in ptrace_reparented()
[all …]
/Linux-v5.15/drivers/scsi/aic7xxx/aicasm/
Daicasm_gram.y20 * 3. Neither the names of the above-listed copyright holders nor the names
224 %left '+' '-'
280 stop("Prefix multiply defined",
284 stop("Unable to record prefix", EX_SOFTWARE);
292 stop("Patch argument list multiply defined",
296 stop("Unable to record patch arg list", EX_SOFTWARE);
312 if ($1->type != UNINITIALIZED) {
313 stop("Register multiply defined", EX_DATAERR);
317 cur_symbol->type = cur_symtype;
327 if (cur_symbol->info.rinfo->valid_bitmask == 0)
[all …]
/Linux-v5.15/arch/arm/mach-lpc32xx/
Dsuspend.S2 * arch/arm/mach-lpc32xx/suspend.S
41 stmfd r0!, {r3 - r7, sp, lr}
65 @ Setup self-refresh with support for manual exit of
66 @ self-refresh mode
72 @ Wait for self-refresh acknowledge, clocks to the DRAM device
73 @ will automatically stop on start of self-refresh
78 bne 3b @ Branch until self-refresh mode starts
80 @ Enter direct-run mode from run mode
97 @ Enter stop mode until an enabled event occurs
104 @ Clear stop status
[all …]
/Linux-v5.15/arch/s390/kvm/
Dtrace-s390.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #define TRACE_SYSTEM kvm-s390
11 #define TRACE_INCLUDE_FILE trace-s390
32 __entry->type = type;
36 __entry->type & KVM_VM_S390_UCONTROL ? " (UCONTROL)" : "")
54 __entry->id = id;
55 __entry->vcpu = vcpu;
56 __entry->sie_block = sie_block;
60 __entry->id, __entry->vcpu, __entry->sie_block)
72 __entry->id = id;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/input/
Ddlg,da7280.txt4 - compatible: Should be "dlg,da7280".
5 - reg: Specifies the I2C slave address.
7 - interrupt-parent : Specifies the phandle of the interrupt controller to
10 - dlg,actuator-type: Set Actuator type. it should be one of:
11 "LRA" - Linear Resonance Actuator type.
12 "ERM-bar" - Bar type Eccentric Rotating Mass.
13 "ERM-coin" - Coin type Eccentric Rotating Mass.
15 - dlg,const-op-mode: Haptic operation mode for FF_CONSTANT.
17 1 - Direct register override(DRO) mode triggered by i2c(default),
18 2 - PWM data source mode controlled by PWM duty,
[all …]
/Linux-v5.15/kernel/trace/
Dtrace_hwlat.c1 // SPDX-License-Identifier: GPL-2.0
3 * trace_hwlat.c - A simple Hardware Latency detector.
18 * SMI mode (complete with special memory map), and the OS is unaware.
20 * Although certain hardware-inducing latencies are necessary (for example,
22 * and remote management) they can wreak havoc upon any OS-level performance
23 * guarantees toward low-latency, especially when the OS is not even made
27 * sampling the built-in CPU timer, looking for discontiguous readings.
31 * environment requiring any kind of low-latency performance
34 * Copyright (C) 2008-2009 Jon Masters, Red Hat, Inc. <jcm@redhat.com>
35 * Copyright (C) 2013-2016 Steven Rostedt, Red Hat, Inc. <srostedt@redhat.com>
[all …]
/Linux-v5.15/arch/m68k/include/asm/
Dmcfuart.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * mcfuart.h -- ColdFire internal UART support defines.
7 * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com)
29 #define MCFUART_UMR 0x00 /* Mode register (r/w) */
57 * Define bit flags in Mode Register 1 (MR1).
62 #define MCFUART_MR1_RXERRBLOCK 0x20 /* RX block error mode */
63 #define MCFUART_MR1_RXERRCHAR 0x00 /* RX char error mode */
77 * Define bit flags in Mode Register 2 (MR2).
79 #define MCFUART_MR2_LOOPBACK 0x80 /* Loopback mode */
80 #define MCFUART_MR2_REMOTELOOP 0xc0 /* Remote loopback mode */
[all …]
/Linux-v5.15/drivers/net/wireless/intel/iwlwifi/
Diwl-op-mode.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2021 Intel Corporation
4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH
12 #include "iwl-dbg-tlv.h"
23 * DOC: Operational mode - what is it ?
25 * The operational mode (a.k.a. op_mode) is the layer that implements
35 * DOC: Life cycle of the Operational mode
37 * The operational mode has a very simple life cycle.
39 * 1) The driver layer (iwl-drv.c) chooses the op_mode based on the
41 * 2) The driver layer starts the op_mode (ops->start)
[all …]
/Linux-v5.15/drivers/watchdog/
Dpnx4008_wdt.c1 // SPDX-License-Identifier: GPL-2.0
12 * 2005-2006 (c) MontaVista Software, Inc.
34 /* WatchDog Timer - Chapter 23 Page 207 */
87 /* stop counter, initiate counter reset */ in pnx4008_wdt_start()
92 /* internal and external reset, stop after that */ in pnx4008_wdt_start()
100 writel(wdd->timeout * WDOG_COUNTER_RATE, WDTIM_MATCH0(wdt_base)); in pnx4008_wdt_start()
101 /*enable counter, stop when debugger active */ in pnx4008_wdt_start()
112 writel(0, WDTIM_CTRL(wdt_base)); /*stop counter */ in pnx4008_wdt_stop()
121 wdd->timeout = new_timeout; in pnx4008_wdt_set_timeout()
126 unsigned long mode, void *cmd) in pnx4008_restart_handler() argument
[all …]
/Linux-v5.15/include/linux/soundwire/
Dsdw.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
71 * enum sdw_slave_status - Slave status
85 * enum sdw_clk_stop_type: clock stop operations
87 * @SDW_CLK_PRE_PREPARE: pre clock stop prepare
88 * @SDW_CLK_POST_PREPARE: post clock stop prepare
89 * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
90 * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
100 * enum sdw_command_response - Command response as defined by SDW spec
128 /* block packing mode enum */
[all …]
/Linux-v5.15/drivers/regulator/
Dwm8350-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
3 // wm8350.c -- Voltage and current regulation for the Wolfson WM8350 PMIC
101 switch (wm8350->pmic.isink_A_dcdc) { in wm8350_isink_enable()
109 1 << (wm8350->pmic.isink_A_dcdc - in wm8350_isink_enable()
113 return -EINVAL; in wm8350_isink_enable()
117 switch (wm8350->pmic.isink_B_dcdc) { in wm8350_isink_enable()
125 1 << (wm8350->pmic.isink_B_dcdc - in wm8350_isink_enable()
129 return -EINVAL; in wm8350_isink_enable()
133 return -EINVAL; in wm8350_isink_enable()
145 switch (wm8350->pmic.isink_A_dcdc) { in wm8350_isink_disable()
[all …]
/Linux-v5.15/drivers/staging/rtl8192u/ieee80211/
Dieee80211_wx.c1 // SPDX-License-Identifier: GPL-2.0
7 Host AP project hostap-drivers v0.1.3
8 Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen
10 Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
13 James P. Ketrenos <ipw2100-admin@linux.intel.com>
14 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32 {"N-24G", 5},
33 {"N-5G", 4},
40 char *start, char *stop, in rtl819x_translate_scan() argument
56 memcpy(iwe.u.ap_addr.sa_data, network->bssid, ETH_ALEN); in rtl819x_translate_scan()
[all …]
/Linux-v5.15/drivers/input/serio/
Dps2-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Author: Danilo Krummrich <danilokrummrich@dk-develop.de>
23 #define DRIVER_NAME "ps2-gpio"
50 unsigned char mode; member
66 struct ps2_gpio_data *drvdata = serio->port_data; in ps2_gpio_open()
68 enable_irq(drvdata->irq); in ps2_gpio_open()
74 struct ps2_gpio_data *drvdata = serio->port_data; in ps2_gpio_close()
76 flush_delayed_work(&drvdata->tx_work); in ps2_gpio_close()
77 disable_irq(drvdata->irq); in ps2_gpio_close()
82 struct ps2_gpio_data *drvdata = serio->port_data; in __ps2_gpio_write()
[all …]

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