Searched +full:stm32mp1 +full:- +full:rcc +full:- +full:secure (Results 1 – 2 of 2) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Gabriel Fernandez <gabriel.fernandez@st.com>13 The RCC IP is both a reset and a clock controller.14 RCC makes also power management (resume/supend and wakeup interrupt).18 Documentation/devicetree/bindings/clock/clock-bindings.txt24 dt-bindings/clock/stm32mp1-clks.h header and can be used in device33 The index is the bit number within the RCC registers bank, starting from RCC[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved9 #include <linux/clk-provider.h>17 #include <linux/reset-controller.h>21 #include <dt-bindings/clock/stm32mp1-clks.h>163 "ck_hse", "pll4_r", "clk-hse-div2"388 struct gate_cfg *gate_cfg = cfg->cfg; in _clk_hw_register_gate()391 cfg->name, in _clk_hw_register_gate()392 cfg->parent_name, in _clk_hw_register_gate()393 cfg->flags, in _clk_hw_register_gate()[all …]
