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/Linux-v6.1/Documentation/devicetree/bindings/mfd/
Dst,stm32-lptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Low-Power Timers bindings
10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
12 - PWM output (with programmable prescaler, configurable polarity)
13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
14 - Several counter modes:
15 - quadrature encoder to detect angular position and direction of rotary
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Dst,stm32-timers.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Timers bindings
10 This hardware block provides 3 types of timer along with PWM functionality:
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
16 - basic timers consist of a 16-bit auto-reload counter driven by a
20 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
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/Linux-v6.1/drivers/counter/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Counter devices
6 menuconfig COUNTER config
7 tristate "Counter support"
9 This enables counter device support through the Generic Counter
11 one or more of the counter device drivers below.
13 if COUNTER
16 tristate "ACCES 104-QUAD-8 driver"
20 Say yes here to build support for the ACCES 104-QUAD-8 quadrature
21 encoder counter/interface device family (104-QUAD-8, 104-QUAD-4).
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Dstm32-lptimer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Encoder and Counter driver
9 * Inspired by 104-quad-8 and stm32-timer-trigger drivers.
14 #include <linux/counter.h>
15 #include <linux/mfd/stm32-lptimer.h>
37 ret = regmap_read(priv->regmap, STM32_LPTIM_CR, &val); in stm32_lptim_is_enabled()
51 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, val); in stm32_lptim_set_enable_state()
56 clk_disable(priv->clk); in stm32_lptim_set_enable_state()
57 priv->enabled = false; in stm32_lptim_set_enable_state()
61 /* LP timer must be enabled before writing CMP & ARR */ in stm32_lptim_set_enable_state()
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Dstm32-timer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Timer Encoder and Counter driver
10 #include <linux/counter.h>
11 #include <linux/mfd/stm32-timers.h>
46 static int stm32_count_read(struct counter_device *counter, in stm32_count_read() argument
49 struct stm32_timer_cnt *const priv = counter_priv(counter); in stm32_count_read()
52 regmap_read(priv->regmap, TIM_CNT, &cnt); in stm32_count_read()
58 static int stm32_count_write(struct counter_device *counter, in stm32_count_write() argument
61 struct stm32_timer_cnt *const priv = counter_priv(counter); in stm32_count_write()
64 regmap_read(priv->regmap, TIM_ARR, &ceiling); in stm32_count_write()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
3 # Makefile for Counter devices
6 obj-$(CONFIG_COUNTER) += counter.o
7 counter-y := counter-core.o counter-sysfs.o counter-chrdev.o
9 obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
10 obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o
11 obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
12 obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
13 obj-$(CONFIG_TI_EQEP) += ti-eqep.o
14 obj-$(CONFIG_FTM_QUADDEC) += ftm-quaddec.o
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/Linux-v6.1/arch/arm/boot/dts/
Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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/Linux-v6.1/drivers/clocksource/
Dtimer-stm32.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
6 * Inspired by time-efm32.c from Uwe Kleine-Koenig
23 #include "timer-of.h"
54 * stm32_timer_of_bits_set - set accessor helper
58 * Accessor helper to set the number of bits in the timer-of private
64 struct stm32_timer_private *pd = to->private_data; in stm32_timer_of_bits_set()
66 pd->bits = bits; in stm32_timer_of_bits_set()
70 * stm32_timer_of_bits_get - get accessor helper
73 * Accessor helper to get the number of bits in the timer-of private
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Dtimer-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
11 #include <linux/mfd/stm32-lptimer.h>
40 regmap_write(priv->reg, STM32_LPTIM_CR, 0); in stm32_clkevent_lp_shutdown()
41 regmap_write(priv->reg, STM32_LPTIM_IER, 0); in stm32_clkevent_lp_shutdown()
43 regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_ARRMCF); in stm32_clkevent_lp_shutdown()
55 regmap_write(priv->reg, STM32_LPTIM_CR, 0); in stm32_clkevent_lp_set_timer()
57 regmap_write(priv->reg, STM32_LPTIM_IER, STM32_LPTIM_ARRMIE); in stm32_clkevent_lp_set_timer()
59 regmap_write(priv->reg, STM32_LPTIM_CR, STM32_LPTIM_ENABLE); in stm32_clkevent_lp_set_timer()
60 /* set next event counter */ in stm32_clkevent_lp_set_timer()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
36 bool "BCM2835 timer driver" if COMPILE_TEST
39 Enables the support for the BCM2835 timer driver.
42 bool "BCM mobile timer driver" if COMPILE_TEST
45 Enables the support for the BCM Kona mobile timer driver.
48 bool "Texas Instruments DaVinci timer driver" if COMPILE_TEST
50 Enables the support for the TI DaVinci timer driver.
53 bool "Digicolor timer driver" if COMPILE_TEST
57 Enables the support for the digicolor timer driver.
60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST
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/Linux-v6.1/drivers/pwm/
Dpwm-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer PWM driver
9 * Inspired by Gerald Baeza's pwm-stm32 driver
13 #include <linux/mfd/stm32-lptimer.h>
31 /* STM32 Low-Power Timer is preceded by a configurable power-of-2 prescaler */
47 if (!state->enabled) { in stm32_pwm_lp_apply()
49 /* Disable LP timer */ in stm32_pwm_lp_apply()
50 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, 0); in stm32_pwm_lp_apply()
53 /* disable clock to PWM counter */ in stm32_pwm_lp_apply()
54 clk_disable(priv->clk); in stm32_pwm_lp_apply()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Pulse-Width Modulation (PWM) Support"
5 Generic Pulse-Width Modulation (PWM) support.
7 In Pulse-Width Modulation, a variation of the width of pulses
52 will be called pwm-ab8500.
62 will be called pwm-atmel.
70 (Atmel High-end LCD Controller). This PWM output is mainly used
74 will be called pwm-atmel-hlcdc.
81 Generic PWM framework driver for Atmel Timer Counter Block.
83 A Timer Counter Block provides 6 PWM devices grouped by 2.
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Dpwm-stm32.c1 // SPDX-License-Identifier: GPL-2.0
7 * Inspired by timer-stm32.c from Maxime Coquelin
8 * pwm-atmel.c from Bo Shen
12 #include <linux/mfd/stm32-timers.h>
50 regmap_read(dev->regmap, TIM_CCER, &ccer); in active_channels()
59 return regmap_write(dev->regmap, TIM_CCR1, value); in write_ccrx()
61 return regmap_write(dev->regmap, TIM_CCR2, value); in write_ccrx()
63 return regmap_write(dev->regmap, TIM_CCR3, value); in write_ccrx()
65 return regmap_write(dev->regmap, TIM_CCR4, value); in write_ccrx()
67 return -EINVAL; in write_ccrx()
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/Linux-v6.1/include/linux/mfd/
Dstm32-lptimer.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * STM32 Low-Power Timer parent driver.
6 * Inspired by Benjamin Gaignard's stm32-timers driver
22 #define STM32_LPTIM_CNT 0x1C /* Counter Reg */
24 /* STM32_LPTIM_ISR - bit fields */
29 /* STM32_LPTIM_ICR - bit fields */
33 /* STM32_LPTIM_IER - bit flieds */
36 /* STM32_LPTIM_CR - bit fields */
41 /* STM32_LPTIM_CFGR - bit fields */
57 * struct stm32_lptimer - STM32 Low-Power Timer data assigned by parent device
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Dstm32-timers.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/dma-mapping.h>
24 #define TIM_CNT 0x24 /* Counter */
26 #define TIM_ARR 0x2c /* Auto-Reload Register */
31 #define TIM_BDTR 0x44 /* Break and Dead-Time Reg */
35 #define TIM_CR1_CEN BIT(0) /* Counter Enable */
36 #define TIM_CR1_DIR BIT(4) /* Counter Direction */
37 #define TIM_CR1_ARPE BIT(7) /* Auto-reload Preload Ena */
105 * struct stm32_timers_dma - STM32 timer DMA handling.
110 * @chans: DMA channels available for this timer instance
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/Linux-v6.1/drivers/watchdog/
Dstm32_iwdg.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STM32 Independent Watchdog
32 #define KR_KEY_RELOAD 0xAAAA /* reload counter enable */
47 #define SR_RVU BIT(1) /* Watchdog counter reload value update */
93 dev_dbg(wdd->parent, "%s\n", __func__); in stm32_iwdg_start()
95 tout = clamp_t(unsigned int, wdd->timeout, in stm32_iwdg_start()
96 wdd->min_timeout, wdd->max_hw_heartbeat_ms / 1000); in stm32_iwdg_start()
98 presc = DIV_ROUND_UP(tout * wdt->rate, RLR_MAX + 1); in stm32_iwdg_start()
102 iwdg_pr = presc <= 1 << PR_SHIFT ? 0 : ilog2(presc) - PR_SHIFT; in stm32_iwdg_start()
103 iwdg_rlr = ((tout * wdt->rate) / presc) - 1; in stm32_iwdg_start()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
8 bool "Watchdog Timer Support"
16 on-line as fast as possible after a lock-up. There's both a watchdog
21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source.
34 tristate "WatchDog Timer Driver Core"
36 Say Y here if you want to use the new watchdog timer driver core.
37 This driver provides a framework for all watchdog timer drivers
45 to stop the timer if the process managing it closes the file
51 bool "Update boot-enabled watchdog until userspace takes over"
77 bool "Enable watchdog hrtimer-based pretimeouts"
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/Linux-v6.1/drivers/iio/trigger/
Dstm32-timer-trigger.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/iio/timer/stm32-timer-trigger.h>
13 #include <linux/mfd/stm32-timers.h>
22 /* List the triggers created by each timer */
43 /* List the triggers accepted by each timer */
50 { }, /* timer 6 */
51 { }, /* timer 7 */
54 { }, /* timer 10 */
55 { }, /* timer 11 */
65 { }, /* timer 6 */
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/Linux-v6.1/drivers/mfd/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 tristate "Active-semi ACT8945A"
49 Support for the ACT8945A PMIC from Active-semi. This device
50 features three step-down DC/DC converters and four low-dropout
66 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
69 called sun4i-gpadc.
88 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
119 over at91-usart-serial driver and usart-spi-driver. Only one function
135 tristate "Atmel HLCDC (High-end LCD Controller)"
172 tristate "X-Powers AC100"
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/Linux-v6.1/drivers/rtc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
141 once-per-second update interrupts, used for synchronization.
159 will be called rtc-test.
173 will be called rtc-88pm860x.
183 will be called rtc-88pm80x.
187 tristate "Abracon AB-RTCMC-32.768kHz-B5ZE-S3"
190 AB-RTCMC-32.768kHz-B5ZE-S3 I2C RTC chip.
193 will be called rtc-ab-b5ze-s3.
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/Linux-v6.1/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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/Linux-v6.1/Documentation/ABI/testing/
Dsysfs-bus-iio3 Contact: linux-iio@vger.kernel.org
11 Contact: linux-iio@vger.kernel.org
17 periodic timer, GPIO or high resolution timer).
25 Contact: linux-iio@vger.kernel.org
31 Contact: linux-iio@vger.kernel.org
38 Contact: linux-iio@vger.kernel.org
44 The contents of the label are free-form, but there are some
51 * "proximity-wifi"
52 * "proximity-lte"
53 * "proximity-wifi-lte"
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/Linux-v6.1/drivers/clk/
Dclk-stm32mp1.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/clk-provider.h>
17 #include <linux/reset-controller.h>
21 #include <dt-bindings/clock/stm32mp1-clks.h>
167 "ck_hse", "pll4_r", "clk-hse-div2"
380 /* STM32 Composite clock */
393 struct gate_cfg *gate_cfg = cfg->cfg; in _clk_hw_register_gate()
396 cfg->name, in _clk_hw_register_gate()
397 cfg->parent_name, in _clk_hw_register_gate()
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/Linux-v6.1/drivers/usb/dwc2/
Dcore.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * core.h - DesignWare HS OTG Controller common declarations
5 * Copyright (C) 2004-2013 Synopsys, Inc.
21 * - no_printk: Disable tracing
22 * - pr_info: Print this info to the console
23 * - trace_printk: Print this info to trace buffer (good for verbose logging)
32 dev_name(hsotg->dev), ##__VA_ARGS__)
37 dev_name(hsotg->dev), ##__VA_ARGS__)
42 /* dwc2-hsotg declarations */
74 * struct dwc2_hsotg_ep - driver endpoint definition.
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