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/Linux-v5.15/arch/mips/bcm63xx/
Dclk.c28 static DEFINE_MUTEX(clocks_mutex);
31 static void clk_enable_unlocked(struct clk *clk) in clk_enable_unlocked()
33 if (clk->set && (clk->usage++) == 0) in clk_enable_unlocked()
34 clk->set(clk, 1); in clk_enable_unlocked()
37 static void clk_disable_unlocked(struct clk *clk) in clk_disable_unlocked()
39 if (clk->set && (--clk->usage) == 0) in clk_disable_unlocked()
40 clk->set(clk, 0); in clk_disable_unlocked()
43 static void bcm_hwclock_set(u32 mask, int enable) in bcm_hwclock_set() argument
48 if (enable) in bcm_hwclock_set()
58 static void enet_misc_set(struct clk *clk, int enable) in enet_misc_set() argument
[all …]
/Linux-v5.15/arch/powerpc/kernel/
Dsecurity.c1 // SPDX-License-Identifier: GPL-2.0+
16 #include <asm/asm-prototypes.h>
17 #include <asm/code-patching.h>
31 static enum branch_cache_flush_type count_cache_flush_type = BRANCH_CACHE_FLUSH_NONE;
32 static enum branch_cache_flush_type link_stack_flush_type = BRANCH_CACHE_FLUSH_NONE;
35 static bool no_nospec;
36 static bool btb_flush_enabled;
38 static bool no_spectrev2;
41 static void enable_barrier_nospec(bool enable) in enable_barrier_nospec() argument
43 barrier_nospec_enabled = enable; in enable_barrier_nospec()
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/Linux-v5.15/arch/mips/alchemy/common/
Dusb.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <asm/mach-au1x00/au1000.h>
28 #define USBHEN_RD (1 << 4) /* OHCI reset-done indicator */
29 #define USBHEN_CE (1 << 3) /* OHCI block clock enable */
30 #define USBHEN_E (1 << 2) /* OHCI block enable */
32 #define USBHEN_BE (1 << 0) /* OHCI Big-Endian */
35 #define USBCFG_PFEN (1 << 31) /* prefetch enable (undoc) */
40 #define USBCFG_UCE (1 << 18) /* UDC clock enable */
41 #define USBCFG_ECE (1 << 17) /* EHCI clock enable */
42 #define USBCFG_OCE (1 << 16) /* OHCI clock enable */
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/Linux-v5.15/drivers/clk/bcm/
Dclk-sr.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/bcm-sr.h>
12 #include "clk-iproc.h"
34 static const struct iproc_pll_ctrl sr_genpll0 = {
47 static const struct iproc_clk_ctrl sr_genpll0_clk[] = {
51 .enable = ENABLE_VAL(0x4, 6, 0, 12),
57 .enable = ENABLE_VAL(0x4, 7, 1, 13),
63 .enable = ENABLE_VAL(0x4, 8, 2, 14),
69 .enable = ENABLE_VAL(0x4, 9, 3, 15),
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Dclk-ns2.c16 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/bcm-ns2.h>
22 #include "clk-iproc.h"
41 static const struct iproc_pll_ctrl genpll_scr = {
53 static const struct iproc_clk_ctrl genpll_scr_clk[] = {
61 .enable = ENABLE_VAL(0x0, 18, 12, 0),
67 .enable = ENABLE_VAL(0x0, 19, 13, 0),
73 .enable = ENABLE_VAL(0x0, 20, 14, 0),
79 .enable = ENABLE_VAL(0x0, 21, 15, 0),
85 .enable = ENABLE_VAL(0x0, 22, 16, 0),
[all …]
Dclk-cygnus.c16 #include <linux/clk-provider.h>
23 #include <dt-bindings/clock/bcm-cygnus.h>
24 #include "clk-iproc.h"
51 static void __init cygnus_armpll_init(struct device_node *node) in cygnus_armpll_init()
55 CLK_OF_DECLARE(cygnus_armpll, "brcm,cygnus-armpll", cygnus_armpll_init);
57 static const struct iproc_pll_ctrl genpll = {
71 static const struct iproc_clk_ctrl genpll_clk[] = {
75 .enable = ENABLE_VAL(0x4, 6, 0, 12),
81 .enable = ENABLE_VAL(0x4, 7, 1, 13),
87 .enable = ENABLE_VAL(0x4, 8, 2, 14),
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/Linux-v5.15/drivers/fpga/
Daltera-hps2fpga.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
8 * fpga: altera-hps2fpga: fix HPS2FPGA bridge visibility to L3 masters
9 * Signed-off-by: Anatolij Gustschin <agust@denx.de>
19 * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
23 #include <linux/fpga/fpga-bridge.h>
49 static int alt_hps2fpga_enable_show(struct fpga_bridge *bridge) in alt_hps2fpga_enable_show()
51 struct altera_hps2fpga_data *priv = bridge->priv; in alt_hps2fpga_enable_show()
53 return reset_control_status(priv->bridge_reset); in alt_hps2fpga_enable_show()
57 static unsigned int l3_remap_shadow;
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Daltera-fpga2sdram.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
23 * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
26 #include <linux/fpga/fpga-bridge.h>
56 static int alt_fpga2sdram_enable_show(struct fpga_bridge *bridge) in alt_fpga2sdram_enable_show()
58 struct alt_fpga2sdram_data *priv = bridge->priv; in alt_fpga2sdram_enable_show()
61 regmap_read(priv->sdrctl, ALT_SDR_CTL_FPGAPORTRST_OFST, &value); in alt_fpga2sdram_enable_show()
63 return (value & priv->mask) == priv->mask; in alt_fpga2sdram_enable_show()
66 static inline int _alt_fpga2sdram_enable_set(struct alt_fpga2sdram_data *priv, in _alt_fpga2sdram_enable_set()
67 bool enable) in _alt_fpga2sdram_enable_set() argument
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/Linux-v5.15/sound/soc/codecs/
Dab8500-codec.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2012
8 * for ST-Ericsson.
14 * for ST-Ericsson.
31 #include <linux/mfd/abx500/ab8500-sysctrl.h>
32 #include <linux/mfd/abx500/ab8500-codec.h>
41 #include <sound/soc-dapm.h>
44 #include "ab8500-codec.h"
58 /* Nr of FIR/IIR-coeff banks in ANC-block */
79 static const char * const enum_sid_state[] = {
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Dnau8315.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // nau8315.c -- NAU8315 ALSA SoC Audio Amplifier Driver
22 #include <sound/soc-dai.h>
23 #include <sound/soc-dapm.h>
26 struct gpio_desc *enable; member
30 static int nau8315_daiops_trigger(struct snd_pcm_substream *substream, in nau8315_daiops_trigger()
33 struct snd_soc_component *component = dai->component; in nau8315_daiops_trigger()
37 if (!nau8315->enable) in nau8315_daiops_trigger()
44 if (nau8315->enpin_switch) { in nau8315_daiops_trigger()
45 gpiod_set_value(nau8315->enable, 1); in nau8315_daiops_trigger()
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Dmt6358.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt6358.c -- mt6358 ALSA SoC audio codec driver
107 priv->mtkaif_protocol = mtkaif_protocol; in mt6358_set_mtkaif_protocol()
111 static void playback_gpio_set(struct mt6358_priv *priv) in playback_gpio_set()
114 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_set()
116 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_SET, in playback_gpio_set()
118 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_set()
122 static void playback_gpio_reset(struct mt6358_priv *priv) in playback_gpio_reset()
129 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_reset()
131 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_reset()
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Dak4535.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ak4535.c -- AK4535 ALSA Soc Audio driver
37 static const struct reg_default ak4535_reg_defaults[] = {
55 static bool ak4535_volatile(struct device *dev, unsigned int reg) in ak4535_volatile()
65 static const char *ak4535_mono_gain[] = {"+6dB", "-17dB"};
66 static const char *ak4535_mono_out[] = {"(L + R)/2", "Hi-Z"};
67 static const char *ak4535_hp_out[] = {"Stereo", "Mono"};
68 static const char *ak4535_deemp[] = {"44.1kHz", "Off", "48kHz", "32kHz"};
69 static const char *ak4535_mic_select[] = {"Internal", "External"};
71 static const struct soc_enum ak4535_enum[] = {
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Dwcd-clsh-v2.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
3 // Copyright (c) 2017-2018, Linaro Limited
10 #include "wcd-clsh-v2.h"
22 /* Class-H registers for codecs from and above WCD9335 */
119 static inline void wcd_enable_clsh_block(struct wcd_clsh_ctrl *ctrl, in wcd_enable_clsh_block()
120 bool enable) in wcd_enable_clsh_block() argument
122 struct snd_soc_component *comp = ctrl->comp; in wcd_enable_clsh_block()
124 if ((enable && ++ctrl->clsh_users == 1) || in wcd_enable_clsh_block()
125 (!enable && --ctrl->clsh_users == 0)) in wcd_enable_clsh_block()
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/Linux-v5.15/drivers/media/platform/davinci/
Dvpif.h4 * Copyright (C) 2009 Texas Instruments Incorporated - https://www.ti.com/
137 static inline void vpif_set_bit(u32 reg, u32 bit) in vpif_set_bit()
142 static inline void vpif_clr_bit(u32 reg, u32 bit) in vpif_clr_bit()
153 ((((0xFFFFFFFF) << (32 - bits)) >> (32 - bits)) << pos)
191 /* bit position of clock and channel enable in vpif_chn_ctrl register */
270 /* inline function to enable/disable channel0 */
271 static inline void enable_channel0(int enable) in enable_channel0() argument
273 if (enable) in enable_channel0()
279 /* inline function to enable/disable channel1 */
280 static inline void enable_channel1(int enable) in enable_channel1() argument
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/Linux-v5.15/sound/soc/mediatek/mt8192/
Dmt8192-afe-gpio.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt8192-afe-gpio.c -- Mediatek 8192 afe gpio ctrl
12 #include "mt8192-afe-common.h"
13 #include "mt8192-afe-gpio.h"
15 static struct pinctrl *aud_pinctrl;
61 static struct audio_gpio_attr aud_gpios[MT8192_AFE_GPIO_GPIO_NUM] = {
102 static DEFINE_MUTEX(gpio_request_mutex);
104 static int mt8192_afe_gpio_select(struct device *dev, in mt8192_afe_gpio_select()
112 return -EINVAL; in mt8192_afe_gpio_select()
118 return -EIO; in mt8192_afe_gpio_select()
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/Linux-v5.15/drivers/acpi/
Dosi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * osi.c - _OSI implementation
27 bool enable; member
30 static struct acpi_osi_config {
40 static struct acpi_osi_config osi_config;
41 static struct acpi_osi_entry
48 * Linux-Dell-Video is used by BIOS to disable RTD3 for NVidia graphics
55 {"Linux-Dell-Video", true},
57 * Linux-Lenovo-NV-HDMI-Audio is used by BIOS to power on NVidia's HDMI
58 * audio device which is turned off for power-saving in Windows OS.
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/Linux-v5.15/drivers/gpu/drm/i915/display/
Dintel_fifo_underrun.c55 static bool ivb_can_enable_err_int(struct drm_device *dev) in ivb_can_enable_err_int()
61 lockdep_assert_held(&dev_priv->irq_lock); in ivb_can_enable_err_int()
66 if (crtc->cpu_fifo_underrun_disabled) in ivb_can_enable_err_int()
73 static bool cpt_can_enable_serr_int(struct drm_device *dev) in cpt_can_enable_serr_int()
79 lockdep_assert_held(&dev_priv->irq_lock); in cpt_can_enable_serr_int()
84 if (crtc->pch_fifo_underrun_disabled) in cpt_can_enable_serr_int()
91 static void i9xx_check_fifo_underruns(struct intel_crtc *crtc) in i9xx_check_fifo_underruns()
93 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_check_fifo_underruns()
94 i915_reg_t reg = PIPESTAT(crtc->pipe); in i9xx_check_fifo_underruns()
97 lockdep_assert_held(&dev_priv->irq_lock); in i9xx_check_fifo_underruns()
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/Linux-v5.15/drivers/gpu/drm/i915/
Di915_mitigations.c1 // SPDX-License-Identifier: MIT
14 static unsigned long mitigations __read_mostly = ~0UL;
20 static const char * const names[] = {
29 static int mitigations_set(const char *val, const struct kernel_param *kp) in mitigations_set()
40 return -ENOMEM; in mitigations_set()
43 bool enable = true; in mitigations_set() local
61 enable = !enable; in mitigations_set()
66 enable = !enable; in mitigations_set()
75 if (enable) in mitigations_set()
85 err = -EINVAL; in mitigations_set()
[all …]
/Linux-v5.15/drivers/media/rc/
Drc-loopback.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Loopback driver for rc-core,
8 * which is useful for (scripted) debugging of rc-core without
16 #include <media/rc-core.h>
18 #define DRIVER_NAME "rc-loopback"
34 static struct loopback_dev loopdev;
36 static int loop_set_tx_mask(struct rc_dev *dev, u32 mask) in loop_set_tx_mask()
38 struct loopback_dev *lodev = dev->priv; in loop_set_tx_mask()
41 dev_dbg(&dev->dev, "invalid tx mask: %u\n", mask); in loop_set_tx_mask()
45 dev_dbg(&dev->dev, "setting tx mask: %u\n", mask); in loop_set_tx_mask()
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/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dnbio_v7_0.c36 static void nbio_v7_0_remap_hdp_registers(struct amdgpu_device *adev) in nbio_v7_0_remap_hdp_registers()
39 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); in nbio_v7_0_remap_hdp_registers()
41 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL); in nbio_v7_0_remap_hdp_registers()
44 static u32 nbio_v7_0_get_rev_id(struct amdgpu_device *adev) in nbio_v7_0_get_rev_id()
54 static void nbio_v7_0_mc_access_enable(struct amdgpu_device *adev, bool enable) in nbio_v7_0_mc_access_enable() argument
56 if (enable) in nbio_v7_0_mc_access_enable()
63 static u32 nbio_v7_0_get_memsize(struct amdgpu_device *adev) in nbio_v7_0_get_memsize()
68 static void nbio_v7_0_sdma_doorbell_range(struct amdgpu_device *adev, int instance, in nbio_v7_0_sdma_doorbell_range()
85 static void nbio_v7_0_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell, in nbio_v7_0_vcn_doorbell_range()
105 static void nbio_v7_0_enable_doorbell_aperture(struct amdgpu_device *adev, in nbio_v7_0_enable_doorbell_aperture()
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Dnavi10_ih.c40 static void navi10_ih_set_interrupt_funcs(struct amdgpu_device *adev);
43 * navi10_ih_init_register_offset - Initialize register offset for ih rings
49 static void navi10_ih_init_register_offset(struct amdgpu_device *adev) in navi10_ih_init_register_offset()
53 if (adev->irq.ih.ring_size) { in navi10_ih_init_register_offset()
54 ih_regs = &adev->irq.ih.ih_regs; in navi10_ih_init_register_offset()
55 ih_regs->ih_rb_base = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE); in navi10_ih_init_register_offset()
56 ih_regs->ih_rb_base_hi = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_HI); in navi10_ih_init_register_offset()
57 ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL); in navi10_ih_init_register_offset()
58 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR); in navi10_ih_init_register_offset()
59 ih_regs->ih_rb_rptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_RPTR); in navi10_ih_init_register_offset()
[all …]
Dvega10_ih.c38 static void vega10_ih_set_interrupt_funcs(struct amdgpu_device *adev);
41 * vega10_ih_init_register_offset - Initialize register offset for ih rings
47 static void vega10_ih_init_register_offset(struct amdgpu_device *adev) in vega10_ih_init_register_offset()
51 if (adev->irq.ih.ring_size) { in vega10_ih_init_register_offset()
52 ih_regs = &adev->irq.ih.ih_regs; in vega10_ih_init_register_offset()
53 ih_regs->ih_rb_base = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE); in vega10_ih_init_register_offset()
54 ih_regs->ih_rb_base_hi = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE_HI); in vega10_ih_init_register_offset()
55 ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL); in vega10_ih_init_register_offset()
56 ih_regs->ih_rb_wptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_WPTR); in vega10_ih_init_register_offset()
57 ih_regs->ih_rb_rptr = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_RPTR); in vega10_ih_init_register_offset()
[all …]
/Linux-v5.15/arch/powerpc/include/asm/
Dsetup.h1 /* SPDX-License-Identifier: GPL-2.0 */
37 static inline bool pseries_enable_reloc_on_exc(void) { return false; } in pseries_enable_reloc_on_exc()
38 static inline void pseries_disable_reloc_on_exc(void) {} in pseries_disable_reloc_on_exc()
39 static inline void pseries_big_endian_exceptions(void) {} in pseries_big_endian_exceptions()
40 static inline void pseries_little_endian_exceptions(void) {} in pseries_little_endian_exceptions()
43 void rfi_flush_enable(bool enable);
53 void setup_rfi_flush(enum l1d_flush_type, bool enable);
54 void setup_entry_flush(bool enable);
55 void setup_uaccess_flush(bool enable);
60 static inline void setup_barrier_nospec(void) { } in setup_barrier_nospec()
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/Linux-v5.15/sound/pci/cs46xx/
Dcs46xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 - sometimes the sound is metallic and sibilant, unloading and
25 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
26 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
27 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ variable
28 static bool external_amp[SNDRV_CARDS];
29 static bool thinkpad[SNDRV_CARDS];
30 static bool mmap_valid[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
36 module_param_array(enable, bool, NULL, 0444);
37 MODULE_PARM_DESC(enable, "Enable CS46xx soundcard.");
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/Linux-v5.15/drivers/media/i2c/
Dsaa7127.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * saa7127 - Philips SAA7127/SAA7129 video encoder driver
9 * Copyright (C) 2000-2001 Gillem <htoa@gmx.net>
12 * Based on Stadis 4:2:2 MPEG-2 Decoder Driver by Nathan Laredo
32 * macrovision anti-taping support. This driver will almost certainly
33 * work fine for those chips, except of course for the missing anti-taping
43 #include <media/v4l2-device.h>
46 static int debug;
47 static int test_image;
54 MODULE_PARM_DESC(debug, "debug level (0-2)");
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