| /Linux-v5.15/drivers/staging/media/atomisp/pci/runtime/pipeline/src/ |
| D | pipeline.c | 49 static void pipeline_stage_destroy(struct ia_css_pipeline_stage *stage);
261 /* @brief Add a stage to pipeline.
264 * @param[in] stage_desc The description of the stage
265 * @param[out] stage The successor of the stage.
268 * Add a new stage to a non-NULL pipeline.
269 * The stage consists of an ISP binary or firmware and input and
275 struct ia_css_pipeline_stage **stage) in ia_css_pipeline_create_and_add_stage() argument
295 /* Find the last stage */ in ia_css_pipeline_create_and_add_stage()
300 * stage, if no previous stage, it's an error. in ia_css_pipeline_create_and_add_stage()
314 /* Create the new stage */ in ia_css_pipeline_create_and_add_stage()
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| /Linux-v5.15/drivers/staging/media/atomisp/pci/css_2401_system/hive/ |
| D | ia_css_isp_params.c | 72 const struct ia_css_pipeline_stage *stage, in ia_css_process_aa() argument
76 stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; in ia_css_process_aa()
78 stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; in ia_css_process_aa()
82 … &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; in ia_css_process_aa()
92 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr() argument
99 stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; in ia_css_process_anr()
102 stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; in ia_css_process_anr()
109 &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], in ia_css_process_anr()
113 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = in ia_css_process_anr()
127 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr2() argument
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| /Linux-v5.15/drivers/staging/media/atomisp/pci/css_2400_system/hive/ |
| D | ia_css_isp_params.c | 71 const struct ia_css_pipeline_stage *stage, in ia_css_process_aa() argument
75 stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; in ia_css_process_aa()
77 stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; in ia_css_process_aa()
81 … &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; in ia_css_process_aa()
85 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = in ia_css_process_aa()
94 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr() argument
101 stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; in ia_css_process_anr()
104 stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; in ia_css_process_anr()
111 &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], in ia_css_process_anr()
115 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = in ia_css_process_anr()
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| /Linux-v5.15/drivers/thermal/qcom/ |
| D | qcom-spmi-temp-alarm.c | 67 /* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
77 unsigned int stage; member
80 /* protects .thresh, .stage and chip registers */
88 /* This array maps from GEN2 alarm state to GEN1 alarm stage */
111 * specified over-temperature stage
113 * @stage: Over-temperature stage
117 static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage) in qpnp_tm_decode_temp() argument
119 if (!chip->temp_map || chip->thresh >= THRESH_COUNT || stage == 0 || in qpnp_tm_decode_temp()
120 stage > STAGE_COUNT) in qpnp_tm_decode_temp()
123 return (*chip->temp_map)[chip->thresh][stage - 1]; in qpnp_tm_decode_temp()
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| /Linux-v5.15/drivers/staging/media/atomisp/pci/runtime/pipeline/interface/ |
| D | ia_css_pipeline.h | 25 /* Pipeline stage to be executed on SP/ISP */
31 /* SP function for SP stage */
42 /* Pipeline of n stages to be executed on SP/ISP per stage */
71 /* Stage descriptor used to create a new stage in the pipeline */
151 /* @brief Add a stage to pipeline.
154 * @param[in] stage_desc The description of the stage
155 * @param[out] stage The successor of the stage.
158 * Add a new stage to a non-NULL pipeline.
159 * The stage consists of an ISP binary or firmware and input and output
165 struct ia_css_pipeline_stage **stage);
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| /Linux-v5.15/tools/perf/pmu-events/arch/arm64/ampere/emag/ |
| D | cache.json | 126 "PublicDescription": "Level 1 stage 2 TLB refill",
129 "BriefDescription": "L1 stage 2 TLB refill"
132 "PublicDescription": "Page walk cache level-0 stage-1 hit",
135 "BriefDescription": "Page walk, L0 stage-1 hit"
138 "PublicDescription": "Page walk cache level-1 stage-1 hit",
141 "BriefDescription": "Page walk, L1 stage-1 hit"
144 "PublicDescription": "Page walk cache level-2 stage-1 hit",
147 "BriefDescription": "Page walk, L2 stage-1 hit"
150 "PublicDescription": "Page walk cache level-1 stage-2 hit",
153 "BriefDescription": "Page walk, L1 stage-2 hit"
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| /Linux-v5.15/tools/testing/selftests/kvm/x86_64/ |
| D | vmx_preemption_timer_test.c | 164 int stage; in main() local
186 for (stage = 1;; stage++) { in main()
189 "Stage %d: unexpected exit reason: %u (%s),\n", in main()
190 stage, run->exit_reason, in main()
208 uc.args[1] == stage, "Stage %d: Unexpected register values vmexit, got %lx", in main()
209 stage, (ulong)uc.args[1]); in main()
211 * If this stage 2 then we should verify the vmx pt expiry in main()
218 if (stage == 2) { in main()
220 pr_info("Stage %d: L1 PT expiry TSC (%lu) , L1 TSC deadline (%lu)\n", in main()
221 stage, uc.args[2], uc.args[3]); in main()
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| D | set_boot_cpu_id.c | 53 int stage; in run_vcpu() local
55 for (stage = 0; stage < 2; stage++) { in run_vcpu()
62 uc.args[1] == stage + 1, in run_vcpu()
63 "Stage %d: Unexpected register values vmexit, got %lx", in run_vcpu()
64 stage + 1, (ulong)uc.args[1]); in run_vcpu()
68 TEST_ASSERT(stage == 1, in run_vcpu()
69 "Expected GUEST_DONE in stage 2, got stage %d", in run_vcpu()
70 stage); in run_vcpu()
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| D | hyperv_clock.c | 210 int stage; in main() local
225 for (stage = 1;; stage++) { in main()
228 "Stage %d: unexpected exit reason: %u (%s),\n", in main()
229 stage, run->exit_reason, in main()
241 TEST_ASSERT(stage == 11, "Testing ended prematurely, stage %d\n", in main()
242 stage); in main()
249 uc.args[1] == stage, in main()
250 "Stage %d: Unexpected register values vmexit, got %lx", in main()
251 stage, (ulong)uc.args[1]); in main()
254 if (stage == 7 || stage == 8 || stage == 10) { in main()
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| D | smm_test.c | 42 * SMI handler always report back fixed stage SMRAM_STAGE.
142 int stage, stage_reported; in main() local
172 for (stage = 1;; stage++) { in main()
175 "Stage %d: unexpected exit reason: %u (%s),\n", in main()
176 stage, run->exit_reason, in main()
187 TEST_ASSERT(stage_reported == stage || in main()
189 "Unexpected stage: #%x, got %x", in main()
190 stage, stage_reported); in main()
196 if (stage == 8) { in main()
205 if (stage == 10) in main()
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| D | evmcs_test.c | 148 int stage; in main() local
173 for (stage = 1;; stage++) { in main()
177 "Stage %d: unexpected exit reason: %u (%s),\n", in main()
178 stage, run->exit_reason, in main()
196 uc.args[1] == stage, "Stage %d: Unexpected register values vmexit, got %lx", in main()
197 stage, (ulong)uc.args[1]); in main()
202 if (stage == 8) { in main()
212 if (stage == 9) { in main()
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| D | hyperv_features.c | 173 int stage = 0, r; in guest_test_msrs_access() local
188 switch (stage) { in guest_test_msrs_access()
451 pr_debug("Stage %d: testing msr: 0x%x for %s\n", stage, in guest_test_msrs_access()
454 pr_debug("Stage %d: finish\n", stage); in guest_test_msrs_access()
464 TEST_ASSERT(uc.args[1] == stage, in guest_test_msrs_access()
465 "Unexpected stage: %ld (%d expected)\n", in guest_test_msrs_access()
466 uc.args[1], stage); in guest_test_msrs_access()
476 stage++; in guest_test_msrs_access()
485 int stage = 0, r; in guest_test_hcalls_access() local
500 switch (stage) { in guest_test_hcalls_access()
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| D | get_cpuid_test.c | 121 static void run_vcpu(struct kvm_vm *vm, uint32_t vcpuid, int stage) in run_vcpu() argument
130 uc.args[1] == stage + 1, in run_vcpu()
131 "Stage %d: Unexpected register values vmexit, got %lx", in run_vcpu()
132 stage + 1, (ulong)uc.args[1]); in run_vcpu()
162 int stage; in main() local
175 for (stage = 0; stage < 3; stage++) in main()
176 run_vcpu(vm, VCPU_ID, stage); in main()
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| /Linux-v5.15/drivers/watchdog/ |
| D | kempld_wdt.c | 10 * First the pretimeout stage runs out before the timeout stage gets
77 struct kempld_wdt_stage stage[KEMPLD_WDT_MAX_STAGES]; member
105 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_action() argument
111 if (!stage || !stage->mask) in kempld_wdt_set_stage_action()
115 stage_cfg = kempld_read8(pld, KEMPLD_WDT_STAGE_CFG(stage->id)); in kempld_wdt_set_stage_action()
124 kempld_write8(pld, KEMPLD_WDT_STAGE_CFG(stage->id), stage_cfg); in kempld_wdt_set_stage_action()
131 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_timeout() argument
143 if (!stage) in kempld_wdt_set_stage_timeout()
151 if (stage_timeout64 > stage->mask) in kempld_wdt_set_stage_timeout()
154 stage_timeout = stage_timeout64 & stage->mask; in kempld_wdt_set_stage_timeout()
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| D | sbsa_gwdt.c | 11 * ARM SBSA Generic Watchdog has two stage timeouts:
17 * This driver can operate ARM SBSA Generic Watchdog as a single stage watchdog
19 * In the single stage mode, when the timeout is reached, your system
24 * second stage (as long as the first stage) will be reached, system will be
33 * if action is 0 (the single stage mode):
37 * Note: Since this watchdog timer has two stages, and each stage is determined
38 * by WOR, in the single stage mode, the timeout is (WOR * 2); in the two
40 * is half of that in the single stage mode.
158 * In the single stage mode, The first signal (WS0) is ignored, in sbsa_gwdt_set_timeout()
173 * In the single stage mode, if WS0 is deasserted in sbsa_gwdt_get_timeleft()
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| /Linux-v5.15/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_hw_lm.c | 16 /* These register are offset to mixer base + stage base */
50 * for the stage to be setup
52 * @stage: stage index to setup
54 static inline int _stage_offset(struct dpu_hw_mixer *ctx, enum dpu_stage stage) in _stage_offset() argument
57 if (stage != DPU_STAGE_BASE && stage <= sblk->maxblendstages) in _stage_offset()
58 return sblk->blendstage_base[stage - DPU_STAGE_0]; in _stage_offset()
100 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config_sdm845() argument
106 if (stage == DPU_STAGE_BASE) in dpu_hw_lm_setup_blend_config_sdm845()
109 stage_off = _stage_offset(ctx, stage); in dpu_hw_lm_setup_blend_config_sdm845()
119 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config() argument
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| /Linux-v5.15/Documentation/leds/ |
| D | leds-sc27xx.rst | 16 for the high stage. To be compatible with the hardware pattern
17 format, we should set brightness as 0 for rise stage, fall
18 stage and low stage.
20 - Min stage duration: 125 ms
21 - Max stage duration: 31875 ms
23 Since the stage duration step is 125 ms, the duration should be
|
| /Linux-v5.15/tools/testing/selftests/tc-testing/ |
| D | TdcPlugin.py | 43 def adjust_command(self, stage, command): argument
46 print(' -- {}.adjust_command {}'.format(self.sub_class, stage))
48 # if stage == 'pre':
50 # elif stage == 'setup':
52 # elif stage == 'execute':
54 # elif stage == 'verify':
56 # elif stage == 'teardown':
58 # elif stage == 'post':
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| D | tdc.py | 33 def __init__(self, stage, output, message): argument
34 self.stage = stage
157 def call_adjust_command(self, stage, command): argument
159 command = pgn_inst.adjust_command(stage, command)
180 def exec_cmd(args, pm, stage, command): argument
190 command = pm.call_adjust_command(stage, command)
214 def prepare_env(args, pm, stage, prefix, cmdlist, output = None): argument
232 (proc, foutput) = exec_cmd(args, pm, stage, cmd)
246 stage, output,
272 prepare_env(args, pm, 'setup', "-----> prepare stage", tidx["setup"])
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| /Linux-v5.15/drivers/net/wwan/iosm/ |
| D | iosm_ipc_mmio.c | 21 /* CP execution stage */
46 * execution stage into mmio area
50 /* check if exec stage has one of the valid values */
51 static bool ipc_mmio_is_valid_exec_stage(enum ipc_mem_exec_stage stage) in ipc_mmio_is_valid_exec_stage() argument
53 switch (stage) { in ipc_mmio_is_valid_exec_stage()
85 enum ipc_mem_exec_stage stage; in ipc_mmio_init() local
96 /* Check for a valid execution stage to make sure that the boot code in ipc_mmio_init()
100 stage = ipc_mmio_get_exec_stage(ipc_mmio); in ipc_mmio_init()
101 if (ipc_mmio_is_valid_exec_stage(stage)) in ipc_mmio_init()
108 dev_err(ipc_mmio->dev, "invalid exec stage %X", stage); in ipc_mmio_init()
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| /Linux-v5.15/tools/testing/selftests/tc-testing/plugin-lib/ |
| D | nsPlugin.py | 45 def adjust_command(self, stage, command): argument
46 super().adjust_command(stage, command)
61 if stage == 'setup' or stage == 'execute' or stage == 'verify' or stage == 'teardown':
63 …print('adjust_command: stage is {}; inserting netns stuff in command [{}] list [{}]'.format(stage…
121 def _exec_cmd(self, stage, command): argument
129 self.adjust_command(stage, command)
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| /Linux-v5.15/sound/soc/sprd/ |
| D | sprd-pcm-compress.c | 28 /* Stage 0 IRAM buffer size definition */
36 /* Stage 1 DDR buffer size definition */
52 * The Spreadtrum Audio compress offload mode will use 2-stage DMA transfer to
58 * For 2-stage DMA transfer, we can allocate 2 buffers: IRAM buffer (always
77 /* Stage 0 IRAM buffer */
79 /* Stage 1 DDR buffer */
91 /* Stage 0 IRAM buffer received data size */
93 /* Stage 1 DDR buffer received data size */
95 /* Stage 1 DDR buffer pointer */
275 * Configure the DMA engine 2-stage transfer mode. Channel 1 set as the in sprd_platform_compr_set_params()
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| /Linux-v5.15/drivers/staging/media/atomisp/pci/ |
| D | sh_css_sp.c | 123 unsigned int stage) in store_sp_stage_data() argument
131 sh_css_store_isp_stage_to_ddr(pipe_num, stage); in store_sp_stage_data()
132 sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = in store_sp_stage_data()
133 sh_css_store_sp_stage_to_ddr(pipe_num, stage); in store_sp_stage_data()
809 is_sp_stage(struct ia_css_pipeline_stage *stage) in is_sp_stage() argument
811 assert(stage); in is_sp_stage()
812 return stage->sp_func != IA_CSS_PIPELINE_NO_FUNC; in is_sp_stage()
897 unsigned int stage, in sh_css_sp_init_stage() argument
935 sh_css_sp_group.pipe[thread_id].sp_stage_addr[stage] = mmgr_NULL; in sh_css_sp_init_stage()
943 sh_css_sp_stage.deinterleaved = ((stage == 0) && continuous); in sh_css_sp_init_stage()
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| /Linux-v5.15/tools/testing/selftests/kvm/ |
| D | kvm_page_table_test.c | 78 /* Whether the test stage is updated, or completed */
111 * All vCPU threads will be started in this stage, in guest_code()
203 enum test_stage stage; in vcpu_worker() local
225 stage = READ_ONCE(*current_stage); in vcpu_worker()
231 pr_debug("vCPU %d has completed stage %s\n" in vcpu_worker()
233 vcpu_id, test_stage_string[stage], in vcpu_worker()
339 static void vcpus_complete_new_stage(enum test_stage stage) in vcpus_complete_new_stage() argument
344 /* Wake up all the vcpus to run new test stage */ in vcpus_complete_new_stage()
351 /* Wait for all the vcpus to complete new test stage */ in vcpus_complete_new_stage()
356 pr_debug("%d vcpus have completed stage %s\n", in vcpus_complete_new_stage()
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| /Linux-v5.15/Documentation/ABI/testing/ |
| D | sysfs-bus-iio-health-afe440x | 7 specific stage number corresponding to datasheet stage names
19 calculated difference in the value of stage 1 - 2 and 3 - 4.
21 The LED current for the stage is controlled via
39 Transimpedance Amplifier during the associated stage.
|
