Searched +full:stacked +full:- +full:memories (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Peripheral-specific properties for a SPI bus.11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be13 need to be defined in the peripheral node because they are per-peripheral and19 - Mark Brown <broonie@kernel.org>27 - minimum: 032 spi-cs-high:[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Mark Brown <broonie@kernel.org>20 pattern: "^spi(@.*|-[0-9a-f])*$"22 "#address-cells":25 "#size-cells":28 cs-gpios:32 increased automatically with max(cs-gpios, hardware chip selects).[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * LPDDR2-NVM MTD driver. This module provides read, write, erase, lock/unlock4 * support for LPDDR2-NVM PCM memories54 /* LPDDR2-NVM Commands */63 /* LPDDR2-NVM Registers offset */72 * &bus_width: memory bus-width (eg: x16 2 Bytes, x32 4 Bytes)92 * Build Mode Register Configuration DataMask based on device bus-width105 * Build Status Register OK DataMask based on device bus-width123 struct pcm_int_data *pcm_data = map->fldrv_priv; in ow_reg_add()125 val = map->pfow_base + offset*pcm_data->bus_width; in ow_reg_add()[all …]
