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/Linux-v6.1/drivers/memory/samsung/
Dexynos-srom.c1 // SPDX-License-Identifier: GPL-2.0
6 // Exynos - SROM Controller support
17 #include "exynos-srom.h"
20 /* SROM side */
29 * struct exynos_srom_reg_dump: register dump of SROM Controller registers.
30 * @offset: srom register offset from the controller base address.
39 * struct exynos_srom: platform data for exynos srom controller driver.
41 * @reg_base: srom base address
67 static int exynos_srom_configure_bank(struct exynos_srom *srom, in exynos_srom_configure_bank() argument
71 u32 timing[6]; in exynos_srom_configure_bank() local
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/Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/
Dexynos-srom.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/exynos-srom.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC SROM Controller driver
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The SROM controller can be used to attach external peripherals. In this case
19 - const: samsung,exynos4210-srom
24 "#address-cells":
27 "#size-cells":
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/Linux-v6.1/arch/arm/boot/dts/
Dexynos5410-smdk5410.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/irq.h>
22 stdout-path = "serial2:115200n8";
26 compatible = "fixed-clock";
27 clock-frequency = <24000000>;
28 clock-output-names = "fin_pll";
29 #clock-cells = <0>;
32 pmic_ap_clk: pmic-ap-clk {
34 compatible = "fixed-clock";
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/Linux-v6.1/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Dmain.h48 * Usage example, e.g. a three-bit field (bits 4-6):
52 * regval = R_REG(osh, &regs->regfoo);
55 * W_REG(osh, &regs->regfoo, regval);
58 (((unsigned)1 << (width)) - 1)
67 /* max # supported core revisions (0 .. MAXCOREREV - 1) */
76 #define BRCMS_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */
91 #define TXFID_QUEUE_MASK 0x0007 /* Bits 0-2 */
92 #define TXFID_SEQ_MASK 0x7FE0 /* Bits 5-15 */
145 ((uint)((wlc)->band->bandunit ? BAND_2G_INDEX : BAND_5G_INDEX))
152 * gmode_user: user config gmode, operating band->gmode is different.
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Dmain.c3 * Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
50 /* n-mode support capability */
82 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
133 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
167 #define BRCMS_PLCP_AUTO -1
172 #define BRCMS_PROTECTION_AUTO -1
199 /* MSC in use,indicates b0-6 holds an mcs */
361 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK] in brcms_basic_rate()
363 return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK]; in brcms_basic_rate()
376 return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME : in get_sifs()
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/Linux-v6.1/arch/arm/mach-s3c/
Dmach-real6410.c1 // SPDX-License-Identifier: GPL-2.0
23 #include <asm/mach-types.h>
28 #include "regs-gpio.h"
29 #include "gpio-samsung.h"
32 #include <linux/soc/samsung/s3c-adc.h>
36 #include <linux/platform_data/mtd-nand-s3c2410.h>
37 #include <linux/platform_data/touchscreen-s3c2410.h>
43 #include "regs-modem-s3c64xx.h"
44 #include "regs-srom-s3c64xx.h"
96 .id = -1,
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Dmach-mini6410.c1 // SPDX-License-Identifier: GPL-2.0
22 #include <asm/mach-types.h>
27 #include "regs-gpio.h"
28 #include "gpio-samsung.h"
30 #include <linux/soc/samsung/s3c-adc.h>
34 #include <linux/platform_data/mtd-nand-s3c2410.h>
35 #include <linux/platform_data/mmc-sdhci-s3c.h>
37 #include <linux/platform_data/touchscreen-s3c2410.h>
44 #include "regs-modem-s3c64xx.h"
45 #include "regs-srom-s3c64xx.h"
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Dmach-smdk6410.c1 // SPDX-License-Identifier: GPL-2.0
29 #include <linux/platform_data/s3c-hsotg.h>
52 #include <asm/mach-types.h>
54 #include "regs-gpio.h"
55 #include "gpio-samsung.h"
56 #include <linux/platform_data/ata-samsung_cf.h>
57 #include <linux/platform_data/i2c-s3c2410.h>
59 #include "gpio-cfg.h"
63 #include <linux/soc/samsung/s3c-adc.h>
64 #include <linux/platform_data/touchscreen-s3c2410.h>
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/Linux-v6.1/include/linux/bcma/
Dbcma_driver_pci.h1 /* SPDX-License-Identifier: GPL-2.0 */
96 #define BCMA_CORE_PCI_SPROM_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */
127 #define BCMA_CORE_PCI_PLP_TIMINGOVRDREG 0x234 /* Timing param override */
237 #define pcicore_read16(pc, offset) bcma_read16((pc)->core, offset)
238 #define pcicore_read32(pc, offset) bcma_read32((pc)->core, offset)
239 #define pcicore_write16(pc, offset, val) bcma_write16((pc)->core, offset, val)
240 #define pcicore_write32(pc, offset, val) bcma_write32((pc)->core, offset, val)
256 return -ENOTSUPP; in bcma_core_pci_pcibios_map_irq()
260 return -ENOTSUPP; in bcma_core_pci_plat_dev_init()
/Linux-v6.1/drivers/staging/vt6655/
Dbaseband.c1 // SPDX-License-Identifier: GPL-2.0+
13 * bb_get_frame_time - Calculate data frame transmitting time
14 * bb_read_embedded - Embedded read baseband register via MAC
15 * bb_write_embedded - Embedded write baseband register via MAC
16 * bb_vt3253_init - VIA VT3253 baseband chip init code
19 * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
20 * 08-07-2003 Bryan YC Fan: Add MAXIM2827/2825 and RFMD2959 support.
21 * 08-26-2003 Kyle Hsu : Modify BBuGetFrameTime() and
26 * 09-01-2003 Bryan YC Fan: RF & BB tables updated.
34 #include "srom.h"
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