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/Linux-v5.15/Documentation/devicetree/bindings/spi/
Dspi-mt65xx.txt1 Binding for MTK SPI controller
4 - compatible: should be one of the following.
5 - mediatek,mt2701-spi: for mt2701 platforms
6 - mediatek,mt2712-spi: for mt2712 platforms
7 - mediatek,mt6589-spi: for mt6589 platforms
8 - mediatek,mt6765-spi: for mt6765 platforms
9 - mediatek,mt7622-spi: for mt7622 platforms
10 - "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms
11 - mediatek,mt8135-spi: for mt8135 platforms
12 - mediatek,mt8173-spi: for mt8173 platforms
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-mcp23s08.txt2 8-/16-bit I/O expander with serial interface (I2C/SPI)
5 - compatible : Should be
6 - "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version
7 - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version
8 - "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or
9 - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip
11 - "microchip,mcp23s08" for 8 GPIO SPI version
12 - "microchip,mcp23s17" for 16 GPIO SPI version
13 - "microchip,mcp23s18" for 16 GPIO SPI version
14 - "microchip,mcp23008" for 8 GPIO I2C version or
[all …]
Dmarvell,dove-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
11 Available mpp pins/groups and functions:
16 name pins functions
23 uart1(cts), lcd-spi(cs1), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
41 ac97-1(sysclko)
[all …]
Dmarvell,armada-37xx-pinctrl.txt12 ------------------------
16 Refer to pinctrl-bindings.txt in this directory for details of the
22 - compatible: "marvell,armada3710-sb-pinctrl", "syscon, "simple-mfd"
24 "marvell,armada3710-nb-pinctrl", "syscon, "simple-mfd"
26 - reg: The first set of register are for pinctrl/gpio and the second
28 - interrupts: list of the interrupt use by the gpio
33 - pins 20-24
34 - functions jtag, gpio
37 - pins 8-10
38 - functions sdio, gpio
[all …]
Dbrcm,ns-pinmux.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/brcm,ns-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom Northstar pins mux controller
10 - Rafał Miłecki <rafal@milecki.pl>
13 Some of Northstar SoCs's pins can be used for various purposes thanks to the
18 A list of pins varies across chipsets so few bindings are available.
23 - brcm,bcm4708-pinmux
24 - brcm,bcm4709-pinmux
[all …]
Dlantiq,pinctrl-xway.txt4 - compatible: "lantiq,pinctrl-xway", (DEPRECATED: Use "lantiq,pinctrl-danube")
5 "lantiq,pinctrl-xr9", (DEPRECATED: Use "lantiq,xrx100-pinctrl" or
6 "lantiq,xrx200-pinctrl")
7 "lantiq,pinctrl-ase", (DEPRECATED: Use "lantiq,ase-pinctrl")
8 "lantiq,<chip>-pinctrl", where <chip> is:
14 - reg: Should contain the physical address and length of the gpio/pinmux
17 Please refer to pinctrl-bindings.txt in this directory for details of the
23 pin, a group, or a list of pins or groups. This configuration can include the
25 pull-up and open-drain
40 Required subnode-properties:
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Dvf610-bk4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
15 stdout-path = &uart1;
23 audio_ext: oscillator-audio {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <24576000>;
29 enet_ext: oscillator-ethernet {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
[all …]
Dnuvoton-npcm730-kudo.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
41 stdout-path = &serial3;
48 iio-hwmon {
49 compatible = "iio-hwmon";
50 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
55 compatible = "nuvoton,npcm750-jtag-master";
56 #address-cells = <1>;
[all …]
Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
Dmt7629-rfb.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
44 reg_3p3v: regulator-3p3v {
45 compatible = "regulator-fixed";
46 regulator-name = "fixed-3.3V";
[all …]
Dspear1310-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear1310-evb", "st,spear1310";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&state_default>;
28 st,pins = "i2c0_grp";
32 st,pins = "i2s0_grp";
36 st,pins = "i2s1_grp";
[all …]
Dspear1340-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear1340-evb", "st,spear1340";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&state_default>;
28 st,pins = "pads_as_gpio_grp";
32 st,pins = "fsmc_8bit_grp";
36 st,pins = "uart0_grp";
[all …]
Darmada-385-clearfog-gtr.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work
9 SERDES mapping -
10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0
12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1
14 4. mini PCIe CON2 - PCIe2
17 USB 2.0 mapping -
18 0. USB 2.0 - 0 USB pins header CON12
19 1. USB 2.0 - 1 mini PCIe CON2
20 2. USB 2.0 - 2 to USB 3.0 connector (used with SERDES #3)
[all …]
Dvf610-zii-dev.dtsi4 * Based on an original 'vf610-twr.dts' which is Copyright 2015,
7 * This file is dual-licensed: you can use it either under the terms
49 stdout-path = "serial0:115200n8";
57 gpio-leds {
58 compatible = "gpio-leds";
59 pinctrl-0 = <&pinctrl_leds_debug>;
60 pinctrl-names = "default";
65 linux,default-trigger = "heartbeat";
69 reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu {
70 compatible = "regulator-fixed";
[all …]
Dimx6q-display5.dtsi5 * This file is dual-licensed: you can use it either under the terms
38 /dts-v1/;
42 #include <dt-bindings/gpio/gpio.h>
43 #include <dt-bindings/pwm/pwm.h>
44 #include <dt-bindings/sound/fsl-imx-audmux.h>
56 compatible = "pwm-backlight";
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_backlight>;
60 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
86 default-brightness-level = <250>;
[all …]
Dbcm283x.dtsi1 #include <dt-bindings/pinctrl/bcm2835.h>
2 #include <dt-bindings/clock/bcm2835.h>
3 #include <dt-bindings/clock/bcm2835-aux.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include <dt-bindings/soc/bcm2835-pm.h>
8 /* firmware-provided startup stubs live here, where the secondary CPUs are
21 #address-cells = <1>;
22 #size-cells = <1>;
30 stdout-path = "serial0:115200n8";
[all …]
Dimx6ul-tx6ul.dtsi2 * Copyright 2015 Lothar Waßmann <LW@KARO-electronics.de>
4 * This file is dual-licensed: you can use it either under the terms
42 #include <dt-bindings/gpio/gpio.h>
43 #include <dt-bindings/interrupt-controller/irq.h>
44 #include <dt-bindings/pwm/pwm.h>
56 lcdif-23bit-pins-a = &pinctrl_disp0_1;
57 lcdif-24bit-pins-a = &pinctrl_disp0_2;
59 reg-can-xcvr = &reg_can_xcvr;
70 stdout-path = &uart1;
75 reg = <0x80000000 0>; /* will be filled by U-Boot */
[all …]
Dqcom-ipq4018-jalapeno.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
16 pins = "gpio53";
21 pins = "gpio52";
26 pins = "gpio52", "gpio53";
27 bias-pull-up;
33 pins = "gpio60", "gpio61";
35 bias-disable;
[all …]
Dqcom-ipq4019-ap.dk04.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
17 stdout-path = "serial0:115200n8";
27 serial_0_pins: serial0-pinmux {
28 pins = "gpio16", "gpio17";
30 bias-disable;
33 serial_1_pins: serial1-pinmux {
[all …]
Dkirkwood-t5325.dts1 // SPDX-License-Identifier: GPL-2.0
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 /dts-v1/;
15 #include "kirkwood-6281.dtsi"
19 compatible = "hp,t5325", "marvell,kirkwood-88f6281", "marvell,kirkwood";
28 stdout-path = &uart0;
32 pinctrl: pin-controller@10000 {
33 pinctrl-0 = <&pmx_i2s &pmx_sysrst>;
34 pinctrl-names = "default";
36 pmx_button_power: pmx-button_power {
[all …]
Dam335x-moxa-uc-2100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 MOXA Inc. - https://www.moxa.com/
13 vbat: vbat-regulator {
14 compatible = "regulator-fixed";
18 vmmcsd_fixed: vmmcsd-regulator {
19 compatible = "regulator-fixed";
20 regulator-name = "vmmcsd_fixed";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
23 regulator-boot-on;
[all …]
/Linux-v5.15/arch/arm64/boot/dts/mediatek/
Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
25 stdout-path = "serial0:115200n8";
31 proc-supply = <&mt6380_vcpu_reg>;
32 sram-supply = <&mt6380_vm_reg>;
36 proc-supply = <&mt6380_vcpu_reg>;
37 sram-supply = <&mt6380_vm_reg>;
[all …]
Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
16 model = "Bananapi BPI-R64";
17 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
24 stdout-path = "serial0:115200n8";
30 proc-supply = <&mt6380_vcpu_reg>;
31 sram-supply = <&mt6380_vm_reg>;
35 proc-supply = <&mt6380_vcpu_reg>;
[all …]
/Linux-v5.15/drivers/pinctrl/
Dpinctrl-falcon.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/pinctrl/pinmux-falcon.c
4 * based on linux/drivers/pinctrl/pinmux-pxa910.c
22 #include "pinctrl-lantiq.h"
47 #define PINS 32 macro
48 #define PORT(x) (x / PINS)
49 #define PORT_PIN(x) (x % PINS)
67 .pins = p, \
90 static struct pinctrl_pin_desc falcon_pads[PORTS * PINS];
95 int base = bank * PINS; in lantiq_load_pin_desc()
[all …]
/Linux-v5.15/arch/arm64/boot/dts/marvell/
Dcn9131-db.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Device tree for the CN9131-DB board.
8 #include "cn9130-db.dtsi"
12 "marvell,armada-ap807-quad", "marvell,armada-ap807";
22 compatible = "regulator-fixed";
23 pinctrl-names = "default";
24 pinctrl-0 = <&cp1_xhci0_vbus_pins>;
25 regulator-name = "cp1-xhci0-vbus";
26 regulator-min-microvolt = <5000000>;
27 regulator-max-microvolt = <5000000>;
[all …]

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