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Searched +full:sparx5 +full:- +full:serdes (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dmicrochip,sparx5-serdes.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Sparx5 Serdes controller
10 - Steen Hegelund <steen.hegelund@microchip.com>
13 The Sparx5 SERDES interfaces share the same basic functionality, but
16 The following list lists the SERDES features:
21 * Rx built-in fault detector (loss-of-lock/loss-of-signal)
22 * Adjustable tx de-emphasis (FFE)
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/Linux-v5.15/drivers/net/ethernet/microchip/sparx5/
Dsparx5_netdev.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Microchip Sparx5 Switch driver
20 /* Max width is 5 bytes - 40 bits. In worst case this will
21 * spread over 6 bytes - 48 bits
32 u32 byte = (35 - (pos / 8)); in __ifh_encode_bitfield()
35 u64 encode = GENMASK_ULL(bit + width - 1, bit) & (value << bit); in __ifh_encode_bitfield()
37 /* The b0-b7 goes into the start IFH byte */ in __ifh_encode_bitfield()
40 /* The b8-b15 goes into the next IFH byte */ in __ifh_encode_bitfield()
42 ifh_hdr[byte - 1] |= (u8)((encode & 0xFF00) >> 8); in __ifh_encode_bitfield()
43 /* The b16-b23 goes into the next IFH byte */ in __ifh_encode_bitfield()
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Dsparx5_main.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Microchip Sparx5 Switch driver
6 * The Sparx5 Chip Register Model can be browsed at this location:
7 * https://github.com/microchip-ung/sparx-5_reginfo
32 ((SPX5_BUFFER_MEMORY / SPX5_BUFFER_CELL_SZ - 100) * (fraction) / 100)
39 struct phy *serdes; member
212 static int sparx5_create_targets(struct sparx5 *sparx5) in sparx5_create_targets() argument
223 if (idx == iomap->range) { in sparx5_create_targets()
229 iores[idx] = platform_get_resource(sparx5->pdev, IORESOURCE_MEM, in sparx5_create_targets()
232 dev_err(sparx5->dev, "Invalid resource\n"); in sparx5_create_targets()
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Dsparx5_port.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Microchip Sparx5 Switch driver
30 status->an_complete = true; in decode_sgmii_word()
32 status->link = false; in decode_sgmii_word()
38 status->speed = SPEED_10; in decode_sgmii_word()
41 status->speed = SPEED_100; in decode_sgmii_word()
44 status->speed = SPEED_1000; in decode_sgmii_word()
47 status->link = false; in decode_sgmii_word()
51 status->duplex = DUPLEX_FULL; in decode_sgmii_word()
53 status->duplex = DUPLEX_HALF; in decode_sgmii_word()
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Dsparx5_main.h1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Microchip Sparx5 Switch driver
21 SPX5_TARGET_CT_7546 = 0x7546, /* SparX-5-64 Enterprise */
22 SPX5_TARGET_CT_7549 = 0x7549, /* SparX-5-90 Enterprise */
23 SPX5_TARGET_CT_7552 = 0x7552, /* SparX-5-128 Enterprise */
24 SPX5_TARGET_CT_7556 = 0x7556, /* SparX-5-160 Enterprise */
25 SPX5_TARGET_CT_7558 = 0x7558, /* SparX-5-200 Enterprise */
26 SPX5_TARGET_CT_7546TSN = 0x47546, /* SparX-5-64i Industrial */
27 SPX5_TARGET_CT_7549TSN = 0x47549, /* SparX-5-90i Industrial */
28 SPX5_TARGET_CT_7552TSN = 0x47552, /* SparX-5-128i Industrial */
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/Linux-v5.15/Documentation/devicetree/bindings/net/
Dmicrochip,sparx5-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Sparx5 Ethernet switch controller
10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com>
14 The SparX-5 Enterprise Ethernet switch family provides a rich set of
15 Enterprise switching features such as advanced TCAM-based VLAN and
17 security through TCAM-based frame processing using versatile content
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/Linux-v5.15/drivers/phy/microchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate "Microchip Sparx5 SerDes PHY driver"
13 Enable this for support of the 10G/25G SerDes on Microchip Sparx5.
Dsparx5_serdes.h1 /* SPDX-License-Identifier: GPL-2.0+
2 * Microchip Sparx5 SerDes driver
86 sdx5_addr(priv->regs, id, tinst, tcnt, in sdx5_rmw()
121 return priv->regs[id + tinst]; in sdx5_inst_get()
Dsparx5_serdes.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Microchip Sparx5 Switch SerDes driver
6 * The Sparx5 Chip Register Model can be browsed at this location:
7 * https://github.com/microchip-ung/sparx-5_reginfo
9 …* https://ww1.microchip.com/downloads/en/DeviceDoc/SparX-5_Family_L2L3_Enterprise_10G_Ethernet_Swi…
99 u8 if_width; /* UDL if-width: 10/16/20/32/64 */
101 enum sparx5_10g28cmu_mode cmu_sel; /* Device/Mode serdes uses */
102 bool no_pwrcycle:1; /* Omit initial power-cycle */
231 enum sparx5_10g28cmu_mode cmu_sel; /* Device/Mode serdes uses */
241 bool no_pwrcycle:1; /* Omit initial power-cycle */
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Dsparx5_serdes_regs.h1 /* SPDX-License-Identifier: GPL-2.0+
2 * Microchip Sparx5 SerDes driver
7 /* This file is autogenerated by cml-utils 2020-11-16 13:11:27 +0100.
/Linux-v5.15/arch/arm64/boot/dts/microchip/
Dsparx5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
11 compatible = "microchip,sparx5";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <2>;
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