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/Linux-v6.1/Documentation/devicetree/bindings/perf/
Darm,smmu-v3-pmcg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/perf/arm,smmu-v3-pmcg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
11 - Robin Murphy <robin.murphy@arm.com>
14 An SMMUv3 may have several Performance Monitor Counter Group (PMCG).
20 pattern: "^pmu@[0-9a-f]*"
23 - items:
24 - const: arm,mmu-600-pmcg
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/Linux-v6.1/drivers/acpi/arm64/
Diort.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <linux/dma-map-ops.h>
44 * iort_set_fwnode() - Create iort_fwnode and use it to register
61 return -ENOMEM; in iort_set_fwnode()
63 INIT_LIST_HEAD(&np->list); in iort_set_fwnode()
64 np->iort_node = iort_node; in iort_set_fwnode()
65 np->fwnode = fwnode; in iort_set_fwnode()
68 list_add_tail(&np->list, &iort_fwnode_list); in iort_set_fwnode()
75 * iort_get_fwnode() - Retrieve fwnode associated with an IORT node
77 * @node: IORT table node to be looked-up
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/Linux-v6.1/drivers/perf/
Darm_smmuv3_pmu.c1 // SPDX-License-Identifier: GPL-2.0
5 * Monitor Counter Groups (PMCG) associated with an SMMUv3 node
8 * SMMUv3 PMCG devices are named as smmuv3_pmcg_<phys_addr_page> where
9 * <phys_addr_page> is the physical page address of the SMMU PMCG wrapped
10 * to 4K boundary. For example, the PMCG at 0xff88840000 is named
15 * filter_enable - 0 = no filtering, 1 = filtering enabled
16 * filter_span - 0 = exact match, 1 = pattern match
17 * filter_stream_id - pattern to filter against
19 * To match a partial StreamID where the X most-significant bits must match
20 * but the Y least-significant bits might differ, STREAMID is programmed
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/Linux-v6.1/drivers/iommu/arm/arm-smmu-v3/
Darm-smmu-v3.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/io-pgtable.h>
27 #include <linux/pci-ats.h>
30 #include "arm-smmu-v3.h"
31 #include "../../dma-iommu.h"
32 #include "../../iommu-sva-lib.h"
37 …domain will report an abort back to the device and will not be allowed to pass through the SMMU.");
42 "Disable MSI-based polling for CMD_SYNC completion.");
84 { ARM_SMMU_OPT_SKIP_PREFETCH, "hisilicon,broken-prefetch-cmd" },
85 { ARM_SMMU_OPT_PAGE0_REGS_ONLY, "cavium,cn9900-broken-page1-regspace"},
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