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/Linux-v5.15/arch/arm/boot/dts/
Dlpc4357-myd-lpc4357.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * MYIR Tech MYD-LPC4357 Development Board with 800x480 7" TFT panel
5 * Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
8 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "myir,myd-lpc4357", "nxp,lpc4357";
20 stdout-path = "serial3:115200n8";
29 compatible = "gpio-leds";
30 pinctrl-names = "default";
31 pinctrl-0 = <&led_pins>;
[all …]
Dstm32mp15-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 adc1_in6_pins_a: adc1-in6-0 {
15 adc12_ain_pins_a: adc12-ain-0 {
24 adc12_ain_pins_b: adc12-ain-1 {
31 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
38 cec_pins_a: cec-0 {
41 bias-disable;
42 drive-open-drain;
[all …]
Dlpc4357-ea4357-devkit.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "ea,lpc4357-developers-kit", "nxp,lpc4357", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "regulator-fixed";
43 regulator-name = "3v3-supply";
44 regulator-min-microvolt = <3300000>;
45 regulator-max-microvolt = <3300000>;
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Dstm32h7-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
47 i2c1_pins_a: i2c1-0 {
51 bias-disable;
52 drive-open-drain;
53 slew-rate = <0>;
57 ethernet_rmii: rmii-0 {
68 slew-rate = <2>;
72 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
[all …]
Dlpc4350-hitex-eval.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "gpio-keys-polled";
43 poll-interval = <100>;
97 compatible = "gpio-leds";
102 linux,default-trigger = "heartbeat";
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Dstm32f7-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
8 #include <dt-bindings/mfd/stm32f7-rcc.h>
12 pinctrl: pin-controller@40020000 {
13 #address-cells = <1>;
14 #size-cells = <1>;
16 interrupt-parent = <&exti>;
18 pins-are-numbered;
21 gpio-controller;
[all …]
Dzynq-zc706.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
31 compatible = "usb-nop-xceiv";
32 #phy-cells = <0>;
37 ps-clk-frequency = <33333333>;
42 phy-mode = "rgmii-id";
[all …]
Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
27 stdout-path = "serial0:115200n8";
30 gpio-keys {
31 compatible = "gpio-keys";
37 wakeup-source;
44 wakeup-source;
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Dlpc4337-ciaa.dts2 * CIAA NXP LPC4337 (http://www.proyecto-ciaa.com.ar)
4 * Copyright (C) 2015 VanguardiaSur - www.vanguardiasur.com.ar
9 * Released under the terms of 3-clause BSD License
12 /dts-v1/;
17 #include "dt-bindings/gpio/gpio.h"
30 stdout-path = &uart2;
40 enet_rmii_pins: enet-rmii-pins {
44 slew-rate = <1>;
45 bias-disable;
46 input-enable;
[all …]
Dstm32f4-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
44 #include <dt-bindings/mfd/stm32f4-rcc.h>
48 pinctrl: pin-controller@40020000 {
49 #address-cells = <1>;
50 #size-cells = <1>;
52 interrupt-parent = <&exti>;
54 pins-are-numbered;
57 gpio-controller;
[all …]
Dzynq-ebaz4205.dts1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
6 /include/ "zynq-7000.dtsi"
10 compatible = "ebang,ebaz4205", "xlnx,zynq-7000";
23 stdout-path = "serial0:115200n8";
28 ps-clk-frequency = <33333333>;
29 fclk-enable = <8>;
34 phy-mode = "mii";
35 phy-handle = <&phy>;
38 assigned-clocks = <&clkc 18>;
[all …]
Dat91-sama7g5ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama7g5ek.dts - Device Tree file for SAMA7G5-EK board
11 /dts-v1/;
12 #include "sama7g5-pinfunc.h"
14 #include <dt-bindings/mfd/atmel-flexcom.h>
15 #include <dt-bindings/input/input.h>
18 model = "Microchip SAMA7G5-EK";
23 stdout-path = "serial0:115200n8";
38 clock-frequency = <32768>;
42 clock-frequency = <24000000>;
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/Linux-v5.15/Documentation/devicetree/bindings/pinctrl/
Dbrcm,bcm11351-pinctrl.txt10 - compatible: Must be "brcm,bcm11351-pinctrl"
11 - reg: Base address of the PAD Controller register block and the size
17 compatible = "brcm,bcm11351-pinctrl";
27 Each pin configuration node is a sub-node of the pin controller node and is a
31 Please refer to the pinctrl-bindings.txt in this directory for details of the
45 details generic pin config properties, please refer to pinctrl-bindings.txt
46 and <include/linux/pinctrl/pinconfig-generic.h>.
54 - pins: Multiple strings. Specifies the name(s) of one or more pins to
59 - function: String. Specifies the pin mux selection. Values
61 - input-schmitt-enable: No arguments. Enable schmitt-trigger mode.
[all …]
Dnvidia,tegra20-pinmux.txt4 - compatible: "nvidia,tegra20-pinmux"
5 - reg: Should contain the register physical address and length for each of
6 the tri-state, mux, pull-up/down, and pad control register sets.
8 Please refer to pinctrl-bindings.txt in this directory for details of the
16 parameters, such as pull-up, tristate, drive strength, etc.
30 Required subnode-properties:
31 - nvidia,pins : An array of strings. Each string contains the name of a pin or
34 Optional subnode-properties:
35 - nvidia,function: A string containing the name of the function to mux to the
38 - nvidia,pull: Integer, representing the pull-down/up to apply to the pin.
[all …]
Dqcom,lpass-lpi-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,lpass-lpi-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
19 const: qcom,sm8250-lpass-lpi-pinctrl
27 - description: LPASS Core voting clock
28 - description: LPASS Audio voting clock
30 clock-names:
32 - const: core
[all …]
Dnvidia,tegra210-pinmux.txt4 - compatible: "nvidia,tegra210-pinmux"
5 - reg: Should contain a list of base address and size pairs for:
6 - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control)
7 - second entry: The PINMUX_AUX_* registers (pinmux)
9 Please refer to pinctrl-bindings.txt in this directory for details of the
17 parameters, such as pull-up, tristate, drive strength, etc.
33 include/dt-binding/pinctrl/pinctrl-tegra.h.
35 Required subnode-properties:
36 - nvidia,pins : An array of strings. Each string contains the name of a pin or
39 Optional subnode-properties:
[all …]
/Linux-v5.15/include/linux/platform_data/
Dad5755.h1 /* SPDX-License-Identifier: GPL-2.0-only */
70 * struct ad5755_platform_data - AD5755 DAC driver platform data
71 * @ext_dc_dc_compenstation_resistor: Whether an external DC-DC converter
73 * @dc_dc_phase: DC-DC converter phase.
74 * @dc_dc_freq: DC-DC converter frequency.
75 * @dc_dc_maxv: DC-DC maximum allowed boost voltage.
80 * @dac.slew.enable: Whether to enable digital slew.
81 * @dac.slew.rate: Slew rate of the digital slew.
82 * @dac.slew.step_size: Slew step size of the digital slew.
96 enum ad5755_slew_rate rate; member
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/Linux-v5.15/arch/arm64/boot/dts/hisilicon/
Dpoplar-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2018 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/pinctrl/hisi.h>
19 emmc_pins_1: emmc-pins-1 {
20 pinctrl-single,pins = <
31 pinctrl-single,bias-pulldown = <
34 pinctrl-single,bias-pullup = <
37 pinctrl-single,slew-rate = <
40 pinctrl-single,drive-strength = <
45 emmc_pins_2: emmc-pins-2 {
[all …]
/Linux-v5.15/drivers/iio/dac/
Dad5755.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * AD5755, AD5755-1, AD5757, AD5735, AD5737 Digital to analog converters driver
67 * struct ad5755_chip_info - chip specific information
79 * struct ad5755_state - driver instance specific data
164 st->data[0].d32 = cpu_to_be32((reg << 16) | val); in ad5755_write_unlocked()
166 return spi_write(st->spi, &st->data[0].d8[1], 3); in ad5755_write_unlocked()
182 mutex_lock(&st->lock); in ad5755_write()
184 mutex_unlock(&st->lock); in ad5755_write()
195 mutex_lock(&st->lock); in ad5755_write_ctrl()
197 mutex_unlock(&st->lock); in ad5755_write_ctrl()
[all …]
/Linux-v5.15/drivers/net/can/cc770/
Dcc770_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * in your board-specific code:
29 * interrupt-parent = <&mpic>;
30 * bosch,external-clock-frequency = <16000000>;
53 MODULE_DESCRIPTION("Socket-CAN driver for CC770 on the platform bus");
61 return ioread8(priv->reg_base + reg); in cc770_platform_read_reg()
67 iowrite8(val, priv->reg_base + reg); in cc770_platform_write_reg()
73 struct device_node *np = pdev->dev.of_node; in cc770_get_of_node_data()
78 prop = of_get_property(np, "bosch,external-clock-frequency", in cc770_get_of_node_data()
84 priv->can.clock.freq = clkext; in cc770_get_of_node_data()
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dnvidia,tegra20-usb-phy.txt6 - compatible : For Tegra20, must contain "nvidia,tegra20-usb-phy".
7 For Tegra30, must contain "nvidia,tegra30-usb-phy". Otherwise, must contain
8 "nvidia,<chip>-usb-phy" plus at least one of the above, where <chip> is
10 - reg : Defines the following set of registers, in the order listed:
11 - The PHY's own register set.
13 - The register set of the PHY containing the UTMI pad control registers.
14 Present if-and-only-if phy_type == utmi.
15 - phy_type : Should be one of "utmi", "ulpi" or "hsic".
16 - clocks : Defines the clocks listed in the clock-names property.
17 - clock-names : The following clock names must be present:
[all …]
Dmediatek,tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek T-PHY Controller Device Tree Bindings
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The T-PHY controller supports physical layer functionality for a number of
17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and
18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode:
19 -----------------------------------
62 added on V2; the FMREG bank for slew rate calibration is not used anymore
[all …]
Dmediatek,xsphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek XS-PHY Controller Device Tree Bindings
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The XS-PHY controller supports physical layer functionality for USB3.1
18 ----------------------------------
45 pattern: "^xs-phy@[0-9a-f]+$"
49 - enum:
50 - mediatek,mt3611-xsphy
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/regulator/
Dvctrl.txt5 --------------------
6 - compatible : must be "vctrl-regulator".
7 - regulator-min-microvolt : smallest voltage consumers may set
8 - regulator-max-microvolt : largest voltage consumers may set
9 - ctrl-supply : The regulator supplying the control voltage.
10 - ctrl-voltage-range : an array of two integer values describing the range
13 regulator-min/max-microvolt output voltage.
16 --------------------
17 - ovp-threshold-percent : overvoltage protection (OVP) threshold of the
28 - min-slew-down-rate : Describes how slowly the regulator voltage will decay
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/net/can/
Dcc770.txt8 - compatible : should be "bosch,cc770" for the CC770 and "intc,82527"
11 - reg : should specify the chip select, address offset and size required
14 - interrupts : property with a value describing the interrupt source
19 - bosch,external-clock-frequency : frequency of the external oscillator
24 - bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
28 - bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
31 - bosch,disconnect-rx0-input : see data sheet.
33 - bosch,disconnect-rx1-input : see data sheet.
35 - bosch,disconnect-tx1-output : see data sheet.
37 - bosch,polarity-dominant : see data sheet.
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