| /Linux-v5.15/drivers/net/wwan/iosm/ |
| D | iosm_ipc_protocol_ops.h | 1 /* SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
14 * enum ipc_mem_td_cs - Completion status of a TD
15 * @IPC_MEM_TD_CS_INVALID: Initial status - td not yet used.
16 * @IPC_MEM_TD_CS_PARTIAL_TRANSFER: More data pending -> next TD used for this
33 * enum ipc_mem_msg_cs - Completion status of IPC Message
45 * struct ipc_msg_prep_args_pipe - struct for pipe args for message preparation
53 * struct ipc_msg_prep_args_sleep - struct for sleep args for message
56 * @state: 0=enter sleep, 1=exit sleep
64 * struct ipc_msg_prep_feature_set - struct for feature set argument for
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| /Linux-v5.15/arch/arm64/boot/dts/qcom/ |
| D | msm8994.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
7 #include <dt-bindings/power/qcom-rpmpd.h>
10 interrupt-parent = <&intc>;
12 #address-cells = <2>;
13 #size-cells = <2>;
18 xo_board: xo-board {
19 compatible = "fixed-clock";
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| D | msm8998.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/gpio/gpio.h>
12 interrupt-parent = <&intc>;
14 qcom,msm-id = <292 0x0>;
16 #address-cells = <2>;
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| D | sdm630.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
8 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/soc/qcom,apr.h>
17 interrupt-parent = <&intc>;
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| /Linux-v5.15/arch/arm/boot/dts/ |
| D | stm32mp15xx-dkx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
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| D | stm32mp157c-ed1.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxaa-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/st,stpmic1.h>
17 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
20 stdout-path = "serial0:115200n8";
28 reserved-memory {
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| D | stm32mp15xx-dhcom-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
6 #include "stm32mp15-pinctrl.dtsi"
7 #include "stm32mp15xxaa-pinctrl.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/mfd/st,stpmic1.h>
24 reserved-memory {
25 #address-cells = <1>;
26 #size-cells = <1>;
30 compatible = "shared-dma-pool";
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| /Linux-v5.15/arch/powerpc/boot/dts/ |
| D | mpc8610_hpcd.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <32768>; // L1
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| D | mpc8377_wlan.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2009 Freescale Semiconductor Inc.
9 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
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| D | mpc8377_rdb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
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| D | mpc8377_mds.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
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| D | mpc8378_rdb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
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| D | mpc8378_mds.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
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| /Linux-v5.15/drivers/mtd/lpddr/ |
| D | lpddr_cmds.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
31 static int get_chip(struct map_info *map, struct flchip *chip, int mode);
32 static int chip_ready(struct map_info *map, struct flchip *chip, int mode);
33 static void put_chip(struct map_info *map, struct flchip *chip);
35 struct mtd_info *lpddr_cmdset(struct map_info *map) in lpddr_cmdset() argument
37 struct lpddr_private *lpddr = map->fldrv_priv; in lpddr_cmdset()
47 mtd->priv = map; in lpddr_cmdset()
48 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
51 mtd->_read = lpddr_read; in lpddr_cmdset()
52 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
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| /Linux-v5.15/drivers/iio/imu/inv_icm42600/ |
| D | inv_icm42600_buffer.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
71 *accel = &pack2->accel; in inv_icm42600_fifo_decode_packet()
72 *gyro = &pack2->gyro; in inv_icm42600_fifo_decode_packet()
73 *temp = &pack2->temp; in inv_icm42600_fifo_decode_packet()
74 *timestamp = &pack2->timestamp; in inv_icm42600_fifo_decode_packet()
80 *accel = &pack1->data; in inv_icm42600_fifo_decode_packet()
82 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
90 *gyro = &pack1->data; in inv_icm42600_fifo_decode_packet()
91 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
97 return -EINVAL; in inv_icm42600_fifo_decode_packet()
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| D | inv_icm42600_gyro.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
91 /* 3-axis gyro + temperature */
106 unsigned int sleep; in inv_icm42600_gyro_update_scan_mode() local
109 mutex_lock(&st->lock); in inv_icm42600_gyro_update_scan_mode()
130 ret = inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en); in inv_icm42600_gyro_update_scan_mode()
137 mutex_unlock(&st->lock); in inv_icm42600_gyro_update_scan_mode()
138 /* sleep maximum required time */ in inv_icm42600_gyro_update_scan_mode()
140 sleep = sleep_gyro; in inv_icm42600_gyro_update_scan_mode()
142 sleep = sleep_temp; in inv_icm42600_gyro_update_scan_mode()
143 if (sleep) in inv_icm42600_gyro_update_scan_mode()
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| D | inv_icm42600_accel.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
91 /* 3-axis accel + temperature */
106 unsigned int sleep; in inv_icm42600_accel_update_scan_mode() local
109 mutex_lock(&st->lock); in inv_icm42600_accel_update_scan_mode()
130 ret = inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en); in inv_icm42600_accel_update_scan_mode()
137 mutex_unlock(&st->lock); in inv_icm42600_accel_update_scan_mode()
138 /* sleep maximum required time */ in inv_icm42600_accel_update_scan_mode()
140 sleep = sleep_accel; in inv_icm42600_accel_update_scan_mode()
142 sleep = sleep_temp; in inv_icm42600_accel_update_scan_mode()
143 if (sleep) in inv_icm42600_accel_update_scan_mode()
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| /Linux-v5.15/Documentation/devicetree/bindings/powerpc/ |
| D | sleep.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/powerpc/sleep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerPC sleep property
10 - Rob Herring <robh@kernel.org>
13 Devices on SOCs often have mechanisms for placing devices into low-power
15 this information is more complicated than a cell-index property can
17 may contain a "sleep" property which describes these connections.
19 The sleep property consists of one or more sleep resources, each of
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| /Linux-v5.15/arch/arm/mach-s3c/ |
| D | sleep-s3c2410.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
6 * S3C2410 Power Manager (Suspend-To-RAM) support
8 * Based on PXA/SA1100 sleep code by:
16 #include "map.h"
18 #include "regs-gpio.h"
19 #include "regs-clock.h"
21 #include "regs-mem-s3c24xx.h"
25 * put the cpu into sleep mode
29 @@ prepare cpu to sleep
38 orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command
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| /Linux-v5.15/drivers/iio/imu/inv_mpu6050/ |
| D | inv_mpu_core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
267 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, in inv_mpu6050_pwr_mgmt_1_write() argument
273 clock = st->chip_config.clk; in inv_mpu6050_pwr_mgmt_1_write()
275 temp_dis = !st->chip_config.temp_en; in inv_mpu6050_pwr_mgmt_1_write()
280 if (sleep) in inv_mpu6050_pwr_mgmt_1_write()
283 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); in inv_mpu6050_pwr_mgmt_1_write()
284 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); in inv_mpu6050_pwr_mgmt_1_write()
292 switch (st->chip_type) { in inv_mpu6050_clock_switch()
297 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1); in inv_mpu6050_clock_switch()
300 st->chip_config.clk = clock; in inv_mpu6050_clock_switch()
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| /Linux-v5.15/arch/powerpc/boot/dts/fsl/ |
| D | mpc8568si-post.dtsi | 36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus", "simple-bus";
40 sleep = <&pmc 0x08000000>;
45 compatible = "fsl,mpc8540-pci";
48 bus-range = <0 0xff>;
49 #interrupt-cells = <1>;
50 #size-cells = <2>;
51 #address-cells = <3>;
52 sleep = <&pmc 0x80000000>;
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| D | mpc8569si-post.dtsi | 36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus";
40 sleep = <&pmc 0x08000000>;
45 compatible = "fsl,mpc8548-pcie";
47 #size-cells = <2>;
48 #address-cells = <3>;
49 bus-range = <0 255>;
50 clock-frequency = <33333333>;
52 sleep = <&pmc 0x20000000>;
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| /Linux-v5.15/Documentation/devicetree/bindings/mmc/ |
| D | sdhci-msm.txt | 1 * Qualcomm SDHCI controller (sdhci-msm)
4 and the properties used by the sdhci-msm driver.
7 - compatible: Should contain a SoC-specific string and a IP version string:
9 "qcom,sdhci-msm-v4" for sdcc versions less than 5.0
10 "qcom,sdhci-msm-v5" for sdcc version 5.0
13 string is added to support this change - "qcom,sdhci-msm-v5".
15 "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"
16 "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"
17 "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"
18 "qcom,msm8992-sdhci", "qcom,sdhci-msm-v4"
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| /Linux-v5.15/drivers/reset/ |
| D | reset-qcom-aoss.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/reset-controller.h>
12 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
54 const struct qcom_aoss_reset_map *map = &data->desc->resets[idx]; in qcom_aoss_control_assert() local
56 writel(1, data->base + map->reg); in qcom_aoss_control_assert()
57 /* Wait 6 32kHz sleep cycles for reset */ in qcom_aoss_control_assert()
66 const struct qcom_aoss_reset_map *map = &data->desc->resets[idx]; in qcom_aoss_control_deassert() local
68 writel(0, data->base + map->reg); in qcom_aoss_control_deassert()
69 /* Wait 6 32kHz sleep cycles for reset */ in qcom_aoss_control_deassert()
91 struct device *dev = &pdev->dev; in qcom_aoss_reset_probe()
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| /Linux-v5.15/Documentation/devicetree/bindings/pci/ |
| D | qcom,pcie.txt | 3 - compatible:
7 - "qcom,pcie-ipq8064" for ipq8064
8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
9 - "qcom,pcie-apq8064" for apq8064
10 - "qcom,pcie-apq8084" for apq8084
11 - "qcom,pcie-msm8996" for msm8996 or apq8096
12 - "qcom,pcie-ipq4019" for ipq4019
13 - "qcom,pcie-ipq8074" for ipq8074
14 - "qcom,pcie-qcs404" for qcs404
15 - "qcom,pcie-sdm845" for sdm845
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