| /Linux-v5.10/Documentation/driver-api/ |
| D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
32 A physical connector on the motherboard that accepts a single memory
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
45 same branch can be used in single mode or in lockstep mode. When
50 of correcting more errors than on single mode.
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
57 memories. FB-DIMM and RAMBUS use a different concept for channel, so
60 * Double-channel
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| /Linux-v5.10/Documentation/hwmon/ |
| D | pcf8591.rst | 17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
33 Pins AIN0 to AIN3 are single ended inputs for channels 0 to 3
35 - mode 1 : three differential inputs
39 - mode 2 : single ended and differential mixed
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| D | ltc2978.rst | 10 Addresses scanned: -
18 Addresses scanned: -
26 Addresses scanned: -
34 Addresses scanned: -
42 Addresses scanned: -
52 Addresses scanned: -
60 Addresses scanned: -
68 Addresses scanned: -
76 Addresses scanned: -
84 Addresses scanned: -
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| D | ads7828.rst | 6 * Texas Instruments/Burr-Brown ADS7828
23 - Steve Hardy <shardy@redhat.com>
24 - Vivien Didelot <vivien.didelot@savoirfairelinux.com>
25 - Guillaume Roguez <guillaume.roguez@savoirfairelinux.com>
28 -------------
34 set to true for differential mode, false for default single ended mode.
43 bounded with limits accepted by the chip, described in the datasheet.
45 If no structure is provided, the configuration defaults to single ended
49 -----------
53 The ADS7828 device is a 12-bit 8-channel A/D converter, while the ADS7830 does
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| D | submitting-patches.rst | 10 ----------
14 - Documentation/process/submit-checklist.rst
15 - Documentation/process/submitting-drivers.rst
16 - Documentation/process/submitting-patches.rst
17 - Documentation/process/coding-style.rst
19 * Please run your patch through 'checkpatch --strict'. There should be no
23 * Please use the standard multi-line comment style. Do not mix C and C++
24 style comments in a single driver (with the exception of the SPDX license
35 hardware. In such cases, you should test-build the code on at least one
36 architecture. If run-time testing was not achieved, it should be written
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| /Linux-v5.10/Documentation/devicetree/bindings/hwmon/ |
| D | ina3221.txt | 5 - compatible: Must be "ti,ina3221"
6 - reg: I2C address
9 - ti,single-shot: This chip has two power modes: single-shot (chip takes one
11 chip takes continuous measurements). The continuous mode is
13 but the single-shot mode is more power-friendly and useful
14 for battery-powered device which cares power consumptions
16 If this property is present, the single-shot mode will be
22 - #address-cells: Required only if a child node is present. Must be 1.
23 - #size-cells: Required only if a child node is present. Must be 0.
27 - reg: Must be 0, 1 or 2, corresponding to IN1, IN2 or IN3 port of INA3221
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| /Linux-v5.10/drivers/gpu/drm/arm/display/komeda/ |
| D | komeda_dev.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
87 * Supplied by chip level and returned by the chip entry function xxx_identify,
93 * initialize &komeda_dev->format_table, this function should be called
100 * for CHIP to report or add pipeline and component resources to CORE
103 /** @cleanup: call to chip to cleanup komeda_dev->chip data */
112 * for CORE to get the HW event from the CHIP when interrupt happened.
139 * passed to CHIP by &komeda_dev_funcs->change_opmode(), then CHIP can do the
141 * - KOMEDA_MODE_DISP0: Only one display enabled, pipeline-0 work as master.
142 * - KOMEDA_MODE_DISP1: Only one display enabled, pipeline-0 work as master.
143 * - KOMEDA_MODE_DUAL_DISP: Dual display mode, both display has been enabled.
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| /Linux-v5.10/drivers/irqchip/ |
| D | irq-aspeed-i2c-ic.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2017 ASPEED Technology Inc.
28 * The aspeed chip provides a single hardware interrupt for all of the I2C
29 * busses, so we use a dummy interrupt chip to translate this single interrupt
30 * into multiple interrupts, each associated with a single I2C bus.
35 struct irq_chip *chip = irq_desc_get_chip(desc); in aspeed_i2c_ic_irq_handler() local
39 chained_irq_enter(chip, desc); in aspeed_i2c_ic_irq_handler()
40 status = readl(i2c_ic->base); in aspeed_i2c_ic_irq_handler()
42 bus_irq = irq_find_mapping(i2c_ic->irq_domain, bit); in aspeed_i2c_ic_irq_handler()
45 chained_irq_exit(chip, desc); in aspeed_i2c_ic_irq_handler()
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| /Linux-v5.10/kernel/irq/ |
| D | ipi.c | 1 // SPDX-License-Identifier: GPL-2.0
15 * irq_reserve_ipi() - Setup an IPI to destination cpumask
32 return -EINVAL; in irq_reserve_ipi()
37 return -EINVAL; in irq_reserve_ipi()
43 return -EINVAL; in irq_reserve_ipi()
48 * If the underlying implementation uses a single HW irq on in irq_reserve_ipi()
49 * all cpus then we only need a single Linux irq number for in irq_reserve_ipi()
74 return -EINVAL; in irq_reserve_ipi()
78 virq = irq_domain_alloc_descs(-1, nr_irqs, 0, NUMA_NO_NODE, NULL); in irq_reserve_ipi()
81 return -ENOMEM; in irq_reserve_ipi()
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| D | generic-chip.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Library implementing the most common irq chip callback functions
22 * irq_gc_noop - NOOP function
30 * irq_gc_mask_disable_reg - Mask chip via disable register
33 * Chip has separate enable/disable registers instead of a single mask
40 u32 mask = d->mask; in irq_gc_mask_disable_reg()
43 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_reg()
44 *ct->mask_cache &= ~mask; in irq_gc_mask_disable_reg()
49 * irq_gc_mask_set_bit - Mask chip via setting bit in mask register
52 * Chip has a single mask register. Values of this register are cached
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| /Linux-v5.10/drivers/net/wireless/ti/wl12xx/ |
| D | wl12xx.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
13 /* WiLink 6/7 chip IDs */
19 /* FW chip version for wl127x */
21 /* minimum single-role FW version for wl127x */
26 /* minimum multi-role FW version for wl127x */
32 /* FW chip version for wl128x */
34 /* minimum single-role FW version for wl128x */
39 /* minimum multi-role FW version for wl128x */
127 * A bitmap (where each bit represents a single HLID)
133 * A bitmap (where each bit represents a single HLID) to indicate
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| /Linux-v5.10/Documentation/networking/device_drivers/wan/ |
| D | z8530book.rst | 13 services using this chip.
25 on the chip (each chip has two channels).
28 chip is interface to the I/O and interrupt facilities of the host
34 The DMA mode supports the chip when it is configured to use dual DMA
36 operation for a single channel. With DMA running the Z85230 tops out
38 noting here that many PC machines hang or crash when the chip is driven
41 Transmit DMA mode uses a single DMA channel. The DMA channel is used for
54 Having identified the chip you need to fill in a struct z8530_dev,
55 which describes each chip. This object must exist until you finally
58 interrupt number of the chip. (Each chip has a single interrupt source
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| /Linux-v5.10/drivers/mtd/nand/raw/ |
| D | oxnas_nand.c | 1 // SPDX-License-Identifier: GPL-2.0-only
38 static uint8_t oxnas_nand_read_byte(struct nand_chip *chip) in oxnas_nand_read_byte() argument
40 struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip); in oxnas_nand_read_byte()
42 return readb(oxnas->io_base); in oxnas_nand_read_byte()
45 static void oxnas_nand_read_buf(struct nand_chip *chip, u8 *buf, int len) in oxnas_nand_read_buf() argument
47 struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip); in oxnas_nand_read_buf()
49 ioread8_rep(oxnas->io_base, buf, len); in oxnas_nand_read_buf()
52 static void oxnas_nand_write_buf(struct nand_chip *chip, const u8 *buf, in oxnas_nand_write_buf() argument
55 struct oxnas_nand_ctrl *oxnas = nand_get_controller_data(chip); in oxnas_nand_write_buf()
57 iowrite8_rep(oxnas->io_base, buf, len); in oxnas_nand_write_buf()
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| /Linux-v5.10/Documentation/devicetree/bindings/edac/ |
| D | socfpga-eccmgr.txt | 3 The ECC Manager counts and corrects single bit errors and counts/handles
8 - compatible : Should be "altr,socfpga-ecc-manager"
9 - #address-cells: must be 1
10 - #size-cells: must be 1
11 - ranges : standard definition, should translate from local addresses
17 - compatible : Should be "altr,socfpga-l2-ecc"
18 - reg : Address and size for ECC error interrupt clear registers.
19 - interrupts : Should be single bit error interrupt, then double bit error
22 On Chip RAM ECC
24 - compatible : Should be "altr,socfpga-ocram-ecc"
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| /Linux-v5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | renesas,gyroadc.txt | 1 * Renesas R-Car GyroADC device driver
5 are sampled by the GyroADC block in a round-robin fashion and the result
9 - compatible: Should be "<soc-specific>", "renesas,rcar-gyroadc".
10 The <soc-specific> should be one of:
11 renesas,r8a7791-gyroadc - for the GyroADC block present
13 renesas,r8a7792-gyroadc - for the GyroADC with interrupt
15 - reg: Address and length of the register set for the device
16 - clocks: References to all the clocks specified in the clock-names
18 Documentation/devicetree/bindings/clock/clock-bindings.txt.
19 - clock-names: Shall contain "fck". The "fck" is the GyroADC block clock.
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| /Linux-v5.10/drivers/pinctrl/renesas/ |
| D | pinctrl-rza2.c | 1 // SPDX-License-Identifier: GPL-2.0
23 #define DRIVER_NAME "pinctrl-rza2"
51 #define RZA2_PDR(port) (0x0000 + (port) * 2) /* Direction 16-bit */
52 #define RZA2_PODR(port) (0x0040 + (port)) /* Output Data 8-bit */
53 #define RZA2_PIDR(port) (0x0060 + (port)) /* Input Data 8-bit */
54 #define RZA2_PMR(port) (0x0080 + (port)) /* Mode 8-bit */
55 #define RZA2_DSCR(port) (0x0140 + (port) * 2) /* Drive 16-bit */
56 #define RZA2_PFS(port, pin) (0x0200 + ((port) * 8) + (pin)) /* Fnct 8-bit */
58 #define RZA2_PWPR 0x02ff /* Write Protect 8-bit */
59 #define RZA2_PFENET 0x0820 /* Ethernet Pins 8-bit */
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| /Linux-v5.10/Documentation/devicetree/bindings/mux/ |
| D | mux-controller.txt | 7 multiplexer needed by each consumer, but a single mux controller can of course
8 control several multiplexers for a single consumer.
11 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
12 0-7 for an 8-way multiplexer, etc.
16 ---------
19 want to use with a property containing a 'mux-ctrl-list':
21 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
22 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
23 mux-ctrl-phandle : phandle to mux controller node
24 mux-ctrl-specifier : array of #mux-control-cells specifying the
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| /Linux-v5.10/drivers/w1/slaves/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # 1-wire slaves configuration
6 menu "1-wire Slaves"
11 Say Y here if you want to connect 1-wire thermal sensors to your
17 Say Y here if you want to connect 1-wire
23 Say Y or M here if you want to use a DS2405 1-wire
24 single-channel addressable switch.
25 This device can also work as a single-channel
29 tristate "8-Channel Addressable Switch (IO Expander) 0x29 family support (DS2408)"
31 Say Y here if you want to use a 1-wire
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| /Linux-v5.10/drivers/tty/serial/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
19 comment "Non-8250 serial port support"
39 messages and warnings and which allows logins in single user mode).
67 messages and warnings and which allows logins in single user mode).
89 bool "Early console using RISC-V SBI"
95 Support for early debug console using RISC-V SBI. This enables
101 tristate "BCM1xxx on-chip DUART serial support"
107 the BCM1250 and derived System-On-a-Chip (SOC) devices. Note that
113 the module will be called sb1250-duart.
123 kernel messages and warnings and which allows logins in single user
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| /Linux-v5.10/drivers/pinctrl/cirrus/ |
| D | pinctrl-madera-core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016-2018 Cirrus Logic
17 #include <linux/pinctrl/pinconf-generic.h>
22 #include "../pinctrl-utils.h"
24 #include "pinctrl-madera.h"
28 * NOTE: IDs are zero-indexed for coding convenience
74 * All single-pin functions can be mapped to any GPIO, however pinmux applies
78 * Since these do not correspond to anything in the actual hardware - they are
79 * merely an adaptation to pinctrl's view of the world - we use the same name
91 /* set of pin numbers for single-pin groups, zero-indexed */
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| /Linux-v5.10/Documentation/devicetree/bindings/display/bridge/ |
| D | thine,thc63lvd1024.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
15 streams to parallel data outputs. The chip supports single/dual input/output
19 Single or dual operation mode, output data mapping and DDR output modes are
20 configured through input signals and the chip does not expose any control
33 The device can operate in single-link mode or dual-link mode. In
34 single-link mode, all pixels are received on port@0, and port@1 shall not
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| /Linux-v5.10/include/linux/gpio/ |
| D | machine.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
22 * struct gpiod_lookup - lookup table
23 * @key: either the name of the chip the GPIO belongs to, or the GPIO line name
26 * @chip_hwnum: hardware number (i.e. relative to the chip) of the GPIO, or
50 * struct gpiod_hog - GPIO line hog table
51 * @chip_label: name of the chip the GPIO belongs to
52 * @chip_hwnum: hardware number (i.e. relative to the chip) of the GPIO
67 * Simple definition of a single GPIO under a con_id
87 * Simple definition of a single GPIO hog in an array.
|
| /Linux-v5.10/sound/pci/echoaudio/ |
| D | echoaudio.h | 3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
34 +-----------+
35 record | |<-------------------- Inputs
36 <-------| | |
39 ------->| | +-------+
40 play | |--->|monitor|-------> Outputs
41 +-----------+ | mixer |
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| /Linux-v5.10/drivers/iio/magnetometer/ |
| D | st_magn_spi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2013 STMicroelectronics Inc.
21 * For new single-chip sensors use <device_name> as compatible string.
22 * For old single-chip devices keep <device_name>-magn to maintain
24 * For multi-chip devices, use <device_name>-magn to distinguish which
29 .compatible = "st,lis3mdl-magn",
33 .compatible = "st,lsm303agr-magn",
41 .compatible = "st,lsm9ds1-magn",
55 st_sensors_dev_name_probe(&spi->dev, spi->modalias, sizeof(spi->modalias)); in st_magn_spi_probe()
57 settings = st_magn_get_settings(spi->modalias); in st_magn_spi_probe()
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| /Linux-v5.10/Documentation/devicetree/bindings/fsi/ |
| D | fsi.txt | 4 The FSI bus is probe-able, so the OS is able to enumerate FSI slaves, and
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
8 that is an I2C master - the I2C bus can be described by the device tree under
13 the fsi-master-* binding specifications.
18 fsi-master {
19 /* top-level of FSI bus topology, bound to an FSI master driver and
22 fsi-slave@<link,id> {
26 fsi-slave-engine@<addr> {
32 fsi-slave-engine@<addr> {
39 Note that since the bus is probe-able, some (or all) of the topology may
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