Searched +full:sierra +full:- +full:phy +full:- +full:t0 (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: "http://devicetree.org/schemas/phy/phy-cadence-sierra.yaml#"5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"7 title: Cadence Sierra PHY binding10 This binding describes the Cadence Sierra PHY. Sierra PHY supports multilink14 - Swapnil Jakhade <sjakhade@cadence.com>15 - Yuti Amonkar <yamonkar@cadence.com>20 - cdns,sierra-phy-t021 - ti,sierra-phy-t0[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/4 ---5 $id: "http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#"6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"11 - Kishon Vijay Abraham I <kishon@ti.com>16 - ti,j721e-wiz-16g17 - ti,j721e-wiz-10g18 - ti,am64-wiz-10g19 - ti,j7200-wiz-10g[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Cadence Sierra PHY Driver10 #include <linux/clk-provider.h>15 #include <linux/phy/phy.h>23 #include <dt-bindings/phy/phy.h>24 #include <dt-bindings/phy/phy-cadence.h>29 /* PHY register offsets */179 /* PHY PCS common registers */185 /* PHY PCS lane registers */192 /* PHY PMA common registers */[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/7 #include <dt-bindings/phy/phy.h>8 #include <dt-bindings/phy/phy-ti.h>9 #include <dt-bindings/mux/mux.h>10 #include <dt-bindings/mux/ti-serdes.h>13 cmn_refclk: clock-cmnrefclk {14 #clock-cells = <0>;15 compatible = "fixed-clock";16 clock-frequency = <0>;[all …]
