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/Linux-v5.10/include/linux/
Dtee_drv.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2015-2016, Linaro Limited
24 #define TEE_SHM_DMA_BUF BIT(1) /* Memory with dma-buf handle */
25 #define TEE_SHM_EXT_DMA_BUF BIT(2) /* Memory with dma-buf handle */
28 #define TEE_SHM_POOL BIT(5) /* Memory allocated from pool */
37 * struct tee_context - driver specific context on file pointer data
39 * @list_shm: List of shared memory object owned by this context
44 * shared memory release.
46 * wait for tee-supplicant daemon to be started if not present
49 * non-blocking in nature.
[all …]
/Linux-v5.10/drivers/tee/
Dtee_shm_pool.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/dma-buf.h>
16 struct gen_pool *genpool = poolm->private_data; in pool_op_gen_alloc()
17 size_t s = roundup(size, 1 << genpool->min_alloc_order); in pool_op_gen_alloc()
21 return -ENOMEM; in pool_op_gen_alloc()
24 shm->kaddr = (void *)va; in pool_op_gen_alloc()
25 shm->paddr = gen_pool_virt_to_phys(genpool, va); in pool_op_gen_alloc()
26 shm->size = s; in pool_op_gen_alloc()
33 gen_pool_free(poolm->private_data, (unsigned long)shm->kaddr, in pool_op_gen_free()
34 shm->size); in pool_op_gen_free()
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Dtee_shm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2016, Linaro Limited
6 #include <linux/dma-buf.h>
17 if (shm->pages) { in release_registered_pages()
18 if (shm->flags & TEE_SHM_USER_MAPPED) { in release_registered_pages()
19 unpin_user_pages(shm->pages, shm->num_pages); in release_registered_pages()
23 for (n = 0; n < shm->num_pages; n++) in release_registered_pages()
24 put_page(shm->pages[n]); in release_registered_pages()
27 kfree(shm->pages); in release_registered_pages()
33 struct tee_device *teedev = shm->ctx->teedev; in tee_shm_release()
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/Linux-v5.10/arch/arm64/boot/dts/ti/
Dk3-j721e-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j721e.dtsi"
18 reserved_memory: reserved-memory {
19 #address-cells = <2>;
20 #size-cells = <2>;
26 no-map;
29 c66_1_dma_memory_region: c66-dma-memory@a6000000 {
30 compatible = "shared-dma-pool";
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/Linux-v5.10/arch/arm/boot/dts/
Dstm32mp15xx-osd32.dtsi1 /* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
3 * Copyright (C) 2020 STMicroelectronics - All Rights Reserved
7 #include "stm32mp15-pinctrl.dtsi"
9 #include <dt-bindings/mfd/st,stpmic1.h>
12 reserved-memory {
13 #address-cells = <1>;
14 #size-cells = <1>;
18 compatible = "shared-dma-pool";
20 no-map;
24 compatible = "shared-dma-pool";
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Dstm32mp157c-odyssey-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxac-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
17 model = "Seeed Studio Odyssey-STM32MP157C SOM";
18 compatible = "seeed,stm32mp157c-odyssey-som", "st,stm32mp157";
25 reserved-memory {
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Dam572x-idk-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include "am57xx-idk-common.dtsi"
9 #include "dra74-ipu-dsp-common.dtsi"
17 reserved-memory {
18 #address-cells = <2>;
19 #size-cells = <2>;
22 ipu2_memory_region: ipu2-memory@95800000 {
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Dstm32mp157c-ed1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxaa-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/st,stpmic1.h>
17 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
20 stdout-path = "serial0:115200n8";
28 reserved-memory {
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Dstm32mp15xx-dhcom-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
6 #include "stm32mp15-pinctrl.dtsi"
7 #include "stm32mp15xxaa-pinctrl.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/mfd/st,stpmic1.h>
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
27 compatible = "shared-dma-pool";
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Ddra72-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
5 #include "dra72-evm-common.dtsi"
6 #include "dra72x-mmc-iodelay.dtsi"
15 reserved-memory {
16 #address-cells = <2>;
17 #size-cells = <2>;
20 ipu2_memory_region: ipu2-memory@95800000 {
21 compatible = "shared-dma-pool";
27 dsp1_memory_region: dsp1-memory@99000000 {
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Dexynos-mfc-reserved-memory.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 reserved-memory {
10 #address-cells = <1>;
11 #size-cells = <1>;
15 compatible = "shared-dma-pool";
16 no-map;
22 compatible = "shared-dma-pool";
23 no-map;
31 memory-region = <&mfc_left>, <&mfc_right>;
Ddra72-evm-revc.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
5 #include "dra72-evm-common.dtsi"
6 #include "dra72x-mmc-iodelay.dtsi"
7 #include <dt-bindings/net/ti-dp83867.h>
17 reserved-memory {
18 #address-cells = <2>;
19 #size-cells = <2>;
23 compatible = "shared-dma-pool";
30 compatible = "shared-dma-pool";
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Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
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Dam571x-idk.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include "dra7-mmc-iodelay.dtsi"
11 #include "dra72x-mmc-iodelay.dtsi"
12 #include "am57xx-idk-common.dtsi"
13 #include "dra7-ipu-dsp-common.dtsi"
17 compatible = "ti,am5718-idk", "ti,am5718", "ti,dra7";
[all …]
Ddra71-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
7 #include "dra7-mmc-iodelay.dtsi"
8 #include "dra72x-mmc-iodelay.dtsi"
9 #include <dt-bindings/net/ti-dp83867.h>
12 compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
20 reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
25 ipu2_memory_region: ipu2-memory@95800000 {
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Domap5-uevm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
7 #include "omap5-board-common.dtsi"
11 compatible = "ti,omap5-uevm", "ti,omap5";
18 reserved-memory {
19 #address-cells = <2>;
20 #size-cells = <2>;
23 dsp_memory_region: dsp-memory@95000000 {
24 compatible = "shared-dma-pool";
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/Linux-v5.10/Documentation/devicetree/bindings/reserved-memory/
Dreserved-memory.txt3 Reserved memory is specified as a node under the /reserved-memory node.
12 /reserved-memory node
13 ---------------------
14 #address-cells, #size-cells (required) - standard definition
15 - Should use the same values as the root node
16 ranges (required) - standard definition
17 - Should be empty
19 /reserved-memory/ child nodes
20 -----------------------------
21 Each child of the reserved-memory node specifies one or more regions of
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/Linux-v5.10/Documentation/devicetree/bindings/soc/fsl/
Dqman.txt3 Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
7 - QMan Node
8 - QMan Private Memory Nodes
9 - Example
13 The Queue Manager is part of the Data-Path Acceleration Architecture (DPAA). QMan
16 flow-level queuing, is also responsible for congestion management functions such
22 - compatible
26 May include "fsl,<SoC>-qman"
28 - reg
30 Value type: <prop-encoded-array>
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Dbman.txt3 Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
7 - BMan Node
8 - BMan Private Memory Node
9 - Example
13 The Buffer Manager is part of the Data-Path Acceleration Architecture (DPAA).
20 - compatible
24 May include "fsl,<SoC>-bman"
26 - reg
28 Value type: <prop-encoded-array>
34 - interrupts
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/Linux-v5.10/Documentation/devicetree/bindings/sound/
Dgoogle,cros-ec-codec.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/sound/google,cros-ec-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cheng-Yi Chiang <cychiang@chromium.org>
14 Embedded Controller (EC) and is controlled via a host-command
16 subnode of a cros-ec node.
17 (see Documentation/devicetree/bindings/mfd/google,cros-ec.yaml).
21 const: google,cros-ec-codec
23 "#sound-dai-cells":
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/Linux-v5.10/drivers/usb/core/
Dbuffer.c1 // SPDX-License-Identifier: GPL-2.0
3 * DMA memory management for framework level HCD code (hc_driver)
17 #include <linux/dma-mapping.h>
25 * DMA-Coherent Buffers
28 /* FIXME tune these based on pool statistics ... */
44 pool_max[0] = 0; /* Don't use this pool */ in usb_init_pool_max()
52 * hcd_buffer_create - initialize buffer pools
56 * Call this as part of initializing a host controller that uses the dma
57 * memory allocators. It initializes some pools of dma-coherent memory that
58 * will be shared by all drivers using that controller.
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/Linux-v5.10/Documentation/vm/
Dcleancache.rst14 Cleancache can be thought of as a page-granularity victim cache for clean
20 of unknown and possibly time-varying size.
22 Later, when a cleancache-enabled filesystem wishes to access a page
28 in Xen (using hypervisor memory) and zcache (using in-kernel compressed
48 Mounting a cleancache-enabled filesystem should call "init_fs" to obtain a
49 pool id which, if positive, must be saved in the filesystem's superblock;
51 (presumably about-to-be-evicted) page into cleancache and associate it with
52 the pool id, a file key, and a page index into the file. (The combination
53 of a pool id, a file key, and an index is sometimes called a "handle".)
58 all pages in all files specified by the given pool id and also surrender
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/Linux-v5.10/Documentation/devicetree/bindings/media/
Ds5p-mfc.txt10 - compatible : value should be either one among the following
11 (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
12 (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
13 (c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
14 (d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
15 (e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
16 (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
18 - reg : Physical base address of the IP registers and length of memory
21 - interrupts : MFC interrupt number to the CPU.
22 - clocks : from common clock binding: handle to mfc clock.
[all …]
/Linux-v5.10/kernel/dma/
Dcoherent.c1 // SPDX-License-Identifier: GPL-2.0
3 * Coherent per-device memory handling.
10 #include <linux/dma-direct.h>
11 #include <linux/dma-map-ops.h>
27 if (dev && dev->dma_mem) in dev_get_coherent_memory()
28 return dev->dma_mem; in dev_get_coherent_memory()
35 if (mem->use_dev_dma_pfn_offset) in dma_get_device_base()
36 return phys_to_dma(dev, PFN_PHYS(mem->pfn_base)); in dma_get_device_base()
37 return mem->device_base; in dma_get_device_base()
51 ret = -EINVAL; in dma_init_coherent_memory()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/remoteproc/
Dti,omap-remoteproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
[all …]

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