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Searched +full:sdm845 +full:- +full:llcc (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.15/Documentation/devicetree/bindings/arm/msm/
Dqcom,llcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/msm/qcom,llcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rishabh Bhatnagar <rishabhb@codeaurora.org>
11 - Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
14 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
24 - qcom,sc7180-llcc
25 - qcom,sc7280-llcc
26 - qcom,sdm845-llcc
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/Linux-v5.15/drivers/soc/qcom/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 the low-power state for resources related to the remoteproc
26 resource on a RPM-hardened platform must use this database to get
43 be called qcom-cpr
64 tristate "Qualcomm Technologies, Inc. LLCC driver"
68 Last Level Cache Controller(LLCC) driver for platforms such as,
69 SDM845. This provides interfaces to clients that use the LLCC.
70 Say yes here to enable LLCC slice driver.
105 purpose of exchanging sector-data between the remote filesystem
111 tristate "Qualcomm RPM-Hardened (RPMH) Communication"
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Dllcc-qcom.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
20 #include <linux/soc/qcom/llcc-qcom.h>
59 * struct llcc_slice_config - Data associated with the llcc slice
61 * @slice_id: llcc slice id for each client
75 * When configured to 0 all ways in llcc are probed.
216 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER;
219 * llcc_slice_getd - get llcc slice descriptor
222 * A pointer to llcc slice descriptor will be returned on success and
234 cfg = drv_data->cfg; in llcc_slice_getd()
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/Linux-v5.15/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_catalog.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
37 #define DPU_HW_VER_400 DPU_HW_VER(4, 0, 0) /* sdm845 v1.0 */
38 #define DPU_HW_VER_401 DPU_HW_VER(4, 0, 1) /* sdm845 v2.0 */
94 * SSPP sub-blocks/features
102 * @DPU_SSPP_CSC_10BIT, Support of 10-bit Color space conversion
105 * @DPU_SSPP_QOS_8LVL, SSPP support 8-level QoS control
136 * MIXER sub-blocks/features
138 * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
152 * DSPP sub-blocks
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/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 SoC device tree source
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
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Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/interconnect/qcom,sc7280.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/mailbox/qcom-ipcc.h>
13 #include <dt-bindings/power/qcom-aoss-qmp.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
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Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sc7180.h>
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