/Linux-v6.6/Documentation/devicetree/bindings/mmc/ |
D | sdhci-am654.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Ulf Hansson <ulf.hansson@linaro.org> 14 - $ref: sdhci-common.yaml# 19 - enum: 20 - ti,am62-sdhci 21 - ti,am64-sdhci-4bit [all …]
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D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ulf Hansson <ulf.hansson@linaro.org> 25 "#address-cells": 30 "#size-cells": 37 broken-cd: 42 cd-gpios: 47 non-removable: [all …]
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D | marvell,xenon-sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 mmc-controller.yaml and the properties used by the Xenon implementation. 20 - Ulf Hansson <ulf.hansson@linaro.org> 25 - enum: 26 - marvell,armada-cp110-sdhci 27 - marvell,armada-ap806-sdhci 29 - items: [all …]
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D | arasan,sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Adrian Hunter <adrian.hunter@intel.com> 13 - $ref: mmc-controller.yaml# 14 - if: 18 const: arasan,sdhci-5.1 21 - phys 22 - phy-names 23 - if: [all …]
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/Linux-v6.6/arch/arm/boot/dts/intel/socfpga/ |
D | socfpga_arria10_socdk_sdmmc.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2014-2015 Altera Corporation <www.altera.com> 6 /dts-v1/; 11 cap-sd-highspeed; 12 cap-mmc-highspeed; 13 broken-cd; 14 bus-width = <4>; 15 clk-phase-sd-hs = <0>, <135>; 19 sdmmca-ecc@ff8c2c00 { 20 compatible = "altr,socfpga-sdmmc-ecc"; [all …]
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D | socfpga_arria5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 16 clock-frequency = <25000000>; 22 broken-cd; 23 bus-width = <4>; 24 cap-mmc-highspeed; 25 cap-sd-highspeed; 26 clk-phase-sd-hs = <0>, <135>; 30 cpu1-start-addr = <0xffd080c4>;
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D | socfpga_cyclone5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /dts-v1/; 16 clock-frequency = <25000000>; 22 broken-cd; 23 bus-width = <4>; 24 cap-mmc-highspeed; 25 cap-sd-highspeed; 26 clk-phase-sd-hs = <0>, <135>; 30 cpu1-start-addr = <0xffd080c4>;
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D | socfpga_cyclone5_mcv.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 10 compatible = "altr,socfpga-cyclone5", "altr,socfpga"; 19 &mmc0 { /* On-SoM eMMC */ 20 bus-width = <8>; 21 clk-phase-sd-hs = <0>, <135>;
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D | socfpga_arria10_mercury_aa1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga"; 25 stdout-path = "serial1:115200n8"; 30 phy-mode = "rgmii"; 31 phy-addr = <0xffffffff>; /* probe for phy addr */ 33 max-frame-size = <3800>; 35 phy-handle = <&phy3>; 38 #address-cells = <1>; 39 #size-cells = <0>; 40 compatible = "snps,dwmac-mdio"; [all …]
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/Linux-v6.6/drivers/mmc/host/ |
D | dw_mmc-pltfm.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 20 #include <linux/mfd/altera-sysmgr.h> 24 #include "dw_mmc-pltfm.h" 36 host = devm_kzalloc(&pdev->dev, sizeof(struct dw_mci), GFP_KERNEL); in dw_mci_pltfm_register() 38 return -ENOMEM; in dw_mci_pltfm_register() 40 host->irq = platform_get_irq(pdev, 0); in dw_mci_pltfm_register() 41 if (host->irq < 0) in dw_mci_pltfm_register() 42 return host->irq; in dw_mci_pltfm_register() 44 host->drv_data = drv_data; in dw_mci_pltfm_register() 45 host->dev = &pdev->dev; in dw_mci_pltfm_register() [all …]
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/Linux-v6.6/arch/arm/boot/dts/nxp/imx/ |
D | imx6dl-dhcom-picoitx.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 6 * DHCM-iMX6DL-C0800-R102-F0819-E-SD-RTC-T-HS-I-01D2 7 * DHCOM PCB number: 493-300 or newer 8 * PicoITX PCB number: 487-600 or newer 10 /dts-v1/; 13 #include "imx6qdl-dhcom-som.dtsi" 14 #include "imx6qdl-dhcom-picoitx.dtsi" 18 compatible = "dh,imx6dl-dhcom-picoitx", "dh,imx6dl-dhcom-som",
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D | imx6q-dhcom-pdk2.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2015-2021 DH electronics GmbH 7 * DHCM-iMX6Q-C0800-R102-F0819-E-SD-RTC-T-HS-I-01D2 8 * DHCOM PCB number: 493-300 or newer 9 * PDK2 PCB number: 516-400 or newer 11 /dts-v1/; 14 #include "imx6qdl-dhcom-som.dtsi" 15 #include "imx6qdl-dhcom-pdk2.dtsi" 19 compatible = "dh,imx6q-dhcom-pdk2", "dh,imx6q-dhcom-som",
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/Linux-v6.6/drivers/media/i2c/ |
D | tw9910.c | 1 // SPDX-License-Identifier: GPL-2.0 13 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> 26 #include <linux/v4l2-mediabus.h> 30 #include <media/v4l2-subdev.h> 136 #define IFSEL_S 0x10 /* 01 : S-video decoding */ 146 /* 1 : ITU-R-656 compatible data sequence format */ 147 #define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */ 148 /* 1 : 16-bit YCrCb 4:2:2 output format.*/ 150 /* 0 : free-run output mode */ 151 #define AINC 0x10 /* Serial interface auto-indexing control */ [all …]
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D | tvp514x.c | 1 // SPDX-License-Identifier: GPL-2.0-only 15 * Karicheri Muralidharan <m-karicheri2@ti.com> 24 #include <linux/v4l2-mediabus.h> 28 #include <media/v4l2-async.h> 29 #include <media/v4l2-device.h> 30 #include <media/v4l2-common.h> 31 #include <media/v4l2-mediabus.h> 32 #include <media/v4l2-fwnode.h> 33 #include <media/v4l2-ctrls.h> 35 #include <media/media-entity.h> [all …]
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/Linux-v6.6/Documentation/arch/arm/stm32/ |
D | stm32h750-overview.rst | 6 ------------ 8 The STM32H750 is a Cortex-M7 MCU aimed at various applications. 11 - Cortex-M7 core running up to @480MHz 12 - 128K internal flash, 1MBytes internal RAM 13 - FMC controller to connect SDRAM, NOR and NAND memories 14 - Dual mode QSPI 15 - SD/MMC/SDIO support 16 - Ethernet controller 17 - USB OTFG FS & HS controllers 18 - I2C, SPI, CAN busses support [all …]
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D | stm32h743-overview.rst | 6 ------------ 8 The STM32H743 is a Cortex-M7 MCU aimed at various applications. 11 - Cortex-M7 core running up to @400MHz 12 - 2MB internal flash, 1MBytes internal RAM 13 - FMC controller to connect SDRAM, NOR and NAND memories 14 - Dual mode QSPI 15 - SD/MMC/SDIO support 16 - Ethernet controller 17 - USB OTFG FS & HS controllers 18 - I2C, SPI, CAN busses support [all …]
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D | stm32f746-overview.rst | 6 ------------ 8 The STM32F746 is a Cortex-M7 MCU aimed at various applications. 11 - Cortex-M7 core running up to @216MHz 12 - 1MB internal flash, 320KBytes internal RAM (+4KB of backup SRAM) 13 - FMC controller to connect SDRAM, NOR and NAND memories 14 - Dual mode QSPI 15 - SD/MMC/SDIO support 16 - Ethernet controller 17 - USB OTFG FS & HS controllers 18 - I2C, SPI, CAN busses support [all …]
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D | stm32f769-overview.rst | 6 ------------ 8 The STM32F769 is a Cortex-M7 MCU aimed at various applications. 11 - Cortex-M7 core running up to @216MHz 12 - 2MB internal flash, 512KBytes internal RAM (+4KB of backup SRAM) 13 - FMC controller to connect SDRAM, NOR and NAND memories 14 - Dual mode QSPI 15 - SD/MMC/SDIO support*2 16 - Ethernet controller 17 - USB OTFG FS & HS controllers 18 - I2C*4, SPI*6, CAN*3 busses support [all …]
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/Linux-v6.6/arch/arm64/boot/dts/qcom/ |
D | sc7280-idp.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 9 #include <dt-bindings/input/linux-event-codes.h> 15 #include "sc7280-chrome-common.dtsi" 16 #include "sc7280-herobrine-lte-sku.dtsi" 25 max98360a: audio-codec-0 { 27 pinctrl-names = "default"; 28 pinctrl-0 = <&_en>; 29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; 30 #sound-dai-cells = <0>; [all …]
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/Linux-v6.6/arch/arm/boot/dts/aspeed/ |
D | aspeed-ast2600-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 /dts-v1/; 6 #include "aspeed-g6.dtsi" 7 #include <dt-bindings/gpio/aspeed-gpio.h> 11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600"; 26 reserved-memory { 27 #address-cells = <1>; 28 #size-cells = <1>; 34 compatible = "shared-dma-pool"; 41 compatible = "shared-dma-pool"; [all …]
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/Linux-v6.6/arch/arm64/boot/dts/intel/ |
D | socfpga_n5x_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 compatible = "intel,n5x-socdk", "intel,socfpga-agilex"; 19 stdout-path = "serial0:115200n8"; 29 sdram_edac: memory-controller@f87f8000 { 30 compatible = "snps,ddrc-3.80a"; 39 compatible = "intel,easic-n5x-clkmgr"; 44 phy-mode = "rgmii"; 45 phy-handle = <&phy0>; 47 max-frame-size = <9000>; 50 #address-cells = <1>; [all …]
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D | socfpga_agilex_socdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex"; 19 stdout-path = "serial0:115200n8"; 23 compatible = "gpio-leds"; 53 phy-mode = "rgmii"; 54 phy-handle = <&phy0>; 56 max-frame-size = <9000>; 59 #address-cells = <1>; 60 #size-cells = <0>; 61 compatible = "snps,dwmac-mdio"; [all …]
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/Linux-v6.6/drivers/media/platform/ti/cal/ |
D | cal-camerarx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * TI Camera Access Layer (CAL) - CAMERARX 5 * Copyright (c) 2015-2020 Texas Instruments Inc. 21 #include <media/v4l2-ctrls.h> 22 #include <media/v4l2-fwnode.h> 23 #include <media/v4l2-subdev.h> 28 /* ------------------------------------------------------------------ 30 * ------------------------------------------------------------------ 35 return ioread32(phy->base + offset); in camerarx_read() 40 iowrite32(val, phy->base + offset); in camerarx_write() [all …]
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/Linux-v6.6/drivers/mmc/core/ |
D | host.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (C) 2007-2008 Pierre Ossman 25 #include <linux/mmc/slot-gpio.h> 30 #include "slot-gpio.h" 47 if (!host->bus_ops) in mmc_host_class_prepare() 51 if (host->bus_ops->pre_suspend) in mmc_host_class_prepare() 52 return host->bus_ops->pre_suspend(host); in mmc_host_class_prepare() 77 wakeup_source_unregister(host->ws); in mmc_host_classdev_release() 78 if (of_alias_get_id(host->parent->of_node, "mmc") < 0) in mmc_host_classdev_release() 79 ida_simple_remove(&mmc_host_ida, host->index); in mmc_host_classdev_release() [all …]
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/Linux-v6.6/drivers/media/platform/samsung/exynos4-is/ |
D | mipi-csis.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Samsung S5P/EXYNOS SoC series MIPI-CSI receiver driver 5 * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd. 29 #include <media/drv-intf/exynos-fimc.h> 30 #include <media/v4l2-fwnode.h> 31 #include <media/v4l2-subdev.h> 33 #include "mipi-csis.h" 37 MODULE_PARM_DESC(debug, "Debug level (0-2)"); 51 /* D-PHY control */ 62 #define S5PCSIS_CFG_FMT_USER(x) ((0x30 + x - 1) << 2) [all …]
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