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Searched +full:sc7180 +full:- +full:dp (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.15/Documentation/devicetree/bindings/clock/
Dqcom,sc7180-dispcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sc7180-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock & Reset Controller Binding for SC7180
10 - Taniya Das <tdas@codeaurora.org>
14 power domains on SC7180.
16 See also dt-bindings/clock/qcom,dispcc-sc7180.h.
20 const: qcom,sc7180-dispcc
24 - description: Board XO source
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/Linux-v5.15/Documentation/devicetree/bindings/display/msm/
Ddpu-sc7180.yaml1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dpu-sc7180.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU dt properties for SC7180 target
10 - Krishna Manikandan <mkrishn@codeaurora.org>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS and DPU are mentioned for SC7180 target.
20 - const: qcom,sc7180-mdss
25 reg-names:
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Ddp-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuogee Hsieh <khsieh@codeaurora.org>
19 - qcom,sc7180-dp
29 - description: AHB clock to enable register access
30 - description: Display Port AUX clock
31 - description: Display Port Link clock
32 - description: Link interface clock between DP and PHY
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/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dqcom,qmp-usb3-dp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-usb3-dp-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm QMP USB3 DP PHY controller
11 - Manu Gautam <mgautam@codeaurora.org>
16 - qcom,sc7180-qmp-usb3-dp-phy
17 - qcom,sc7280-qmp-usb3-dp-phy
18 - qcom,sc8180x-qmp-usb3-dp-phy
19 - qcom,sdm845-qmp-usb3-dp-phy
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Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
19 - items:
20 - enum:
21 - qcom,ipq8074-qusb2-phy
22 - qcom,msm8996-qusb2-phy
23 - qcom,msm8998-qusb2-phy
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/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * SC7180 SoC device tree source
5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
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/Linux-v5.15/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manu Gautam <mgautam@codeaurora.org>
15 - enum:
16 - qcom,msm8996-dwc3
17 - qcom,msm8998-dwc3
18 - qcom,sc7180-dwc3
19 - qcom,sc7280-dwc3
20 - qcom,sdm660-dwc3
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/Linux-v5.15/drivers/gpu/drm/msm/dp/
Ddp_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
120 {.compatible = "qcom,sc7180-dp"},
131 spin_lock_irqsave(&dp_priv->event_lock, flag); in dp_add_event()
132 pndx = dp_priv->event_pndx + 1; in dp_add_event()
134 if (pndx == dp_priv->event_gndx) { in dp_add_event()
136 dp_priv->event_pndx, dp_priv->event_gndx); in dp_add_event()
137 spin_unlock_irqrestore(&dp_priv->event_lock, flag); in dp_add_event()
138 return -EPERM; in dp_add_event()
140 todo = &dp_priv->event_list[dp_priv->event_pndx++]; in dp_add_event()
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/Linux-v5.15/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_kms.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
11 #include <linux/dma-buf.h>
57 struct dpu_kms *kms = (struct dpu_kms *)s->private; in _dpu_danger_signal_status()
61 if (!kms->hw_mdp) { in _dpu_danger_signal_status()
68 pm_runtime_get_sync(&kms->pdev->dev); in _dpu_danger_signal_status()
71 if (kms->hw_mdp->ops.get_danger_status) in _dpu_danger_signal_status()
72 kms->hw_mdp->ops.get_danger_status(kms->hw_mdp, in _dpu_danger_signal_status()
76 if (kms->hw_mdp->ops.get_danger_status) in _dpu_danger_signal_status()
77 kms->hw_mdp->ops.get_danger_status(kms->hw_mdp, in _dpu_danger_signal_status()
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Ddpu_hw_catalog.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
43 #define DPU_HW_VER_620 DPU_HW_VER(6, 2, 0) /* sc7180 v1.0 */
94 * SSPP sub-blocks/features
102 * @DPU_SSPP_CSC_10BIT, Support of 10-bit Color space conversion
105 * @DPU_SSPP_QOS_8LVL, SSPP support 8-level QoS control
136 * MIXER sub-blocks/features
138 * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
152 * DSPP sub-blocks
163 * PINGPONG sub-blocks
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/Linux-v5.15/drivers/phy/qualcomm/
Dphy-qcom-qmp.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
23 #include <dt-bindings/phy/phy.h>
25 #include "phy-qcom-qmp.h"
43 /* DP PHY soft reset */
45 /* mux to select DP PHY reset control, 0:HW control, 1: software reset */
54 #define DP_MODE BIT(1) /* enables DP mode */
84 * if yes, then offset gives index in the reg-layout
116 /* set of registers with offsets different per-PHY */
2766 /* struct qmp_phy_cfg - per-PHY initialization config */
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