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/Linux-v5.10/arch/nios2/include/asm/
D	asm-macros.h	16 * You cannnot use the same register for reg1 & reg2. 36 * It is safe to use the same register for reg1 & reg2. 55 * It is safe to use the same register for reg1 & reg2. 75 * It is safe to use the same register for reg1 & reg2. 94 * It is safe to use the same register for reg1 & reg2. 106 * It is safe to use the same register for reg1 & reg2. 118 * It is NOT safe to use the same register for reg1 & reg2. 139 * It is NOT safe to use the same register for reg1 & reg2. 160 * It is NOT safe to use the same register for reg1 & reg2. 182 * It is NOT safe to use the same register for reg1 & reg2. [all …]
/Linux-v5.10/scripts/coccinelle/misc/
D	array_size_dup.cocci	5 /// 1. An opencoded expression is used before array_size() to compute the same size 6 /// 2. An opencoded expression is used after array_size() to compute the same size 43 msg = "WARNING: array_size is used later (line %s) to compute the same size" % (p2[0].line) 51 msg = "WARNING: array_size is used later (line %s) to compute the same size" % (p2[0].line) 72 msg = "WARNING: array_size is already used (line %s) to compute the same size" % (p1[0].line) 80 msg = "WARNING: array_size is already used (line %s) to compute the same size" % (p1[0].line) 108 msg = "WARNING: array3_size is used later (line %s) to compute the same size" % (p2[0].line) 116 msg = "WARNING: array3_size is used later (line %s) to compute the same size" % (p2[0].line) 138 msg = "WARNING: array3_size is already used (line %s) to compute the same size" % (p1[0].line) 146 msg = "WARNING: array3_size is already used (line %s) to compute the same size" % (p1[0].line) [all …]
/Linux-v5.10/kernel/
D	cpu_pm.c	52 * This function may sleep, and has the same return conditions as 67 * This function may sleep, and has the same return conditions as 80 * cause some blocks in the same power domain as the cpu to reset. 83 * responsible for ensuring that cpu_pm_enter is not called twice on the same 89 * Return conditions are same as __raw_notifier_call_chain. 101 * have caused some blocks in the same power domain as the cpu to reset. 107 * Return conditions are same as __raw_notifier_call_chain. 119 * state that may cause some blocks in the same power domain to reset. 129 * Return conditions are same as __raw_notifier_call_chain. 141 * low power state that may have caused some blocks in the same power domain [all …]
/Linux-v5.10/fs/
D	remap_range.c	82 /* Don't allow overlapped cloning within the same file. / in generic_remap_checks() 177 the same file. 190 /* Unlock two pages, being careful not to unlock the same page twice. / 199 Compare extents of two files to see if they are the same. 213 bool same; in vfs_dedupe_file_range_compare() local 217 same = true; in vfs_dedupe_file_range_compare() 249 same = false; in vfs_dedupe_file_range_compare() 260 same = false; in vfs_dedupe_file_range_compare() 269 if (!same) in vfs_dedupe_file_range_compare() 277 *is_same = same; in vfs_dedupe_file_range_compare() [all …]
/Linux-v5.10/Documentation/driver-api/usb/
D	persist.rst	22 has no way to know what has actually happened. Perhaps the same 35 system woke up, who cares? It'll still work the same when you type on 39 devices. The effect is exactly the same as if the device really had 47 interrupts a power session will have the same effect. For example, 83 same thing that happens whenever a USB device is reset.) If the 85 same descriptors as before, including the Vendor and Product IDs, then 86 the kernel continues to use the same device structure. In effect, the 90 The same thing happens if the host controller is in the expected state 125 have the same persistent volume associated with the device. As such 142 to make sure the USB device hasn't been changed; that is, the same [all …]
/Linux-v5.10/Documentation/devicetree/bindings/display/
D	st,stih4xx.txt	18 - clock-names: names of the clocks listed in clocks property in the same 36 - clock-names: names of the clocks listed in clocks property in the same 40 - reset-names: names of the resets listed in resets property in the same 50 the same order. 53 - reset-names: names of the resets listed in resets property in the same 62 the same order. 65 the same order 68 - clock-names: names of the clocks listed in clocks property in the same 78 the same order. 82 - clock-names: names of the clocks listed in clocks property in the same [all …]
/Linux-v5.10/Documentation/admin-guide/
D	cputopology.rst	41 internal kernel map of CPUs within the same core. 46 human-readable list of CPUs within the same core. 51 internal kernel map of the CPUs sharing the same physical_package_id. 56 human-readable list of CPUs sharing the same physical_package_id. 61 internal kernel map of CPUs within the same die. 65 human-readable list of CPUs within the same die. 69 internal kernel map of cpuX's hardware threads within the same 74 human-readable list of cpuX's hardware threads within the same 79 internal kernel map of cpuX's hardware threads within the same 84 human-readable list of cpuX's hardware threads within the same
/Linux-v5.10/tools/perf/pmu-events/arch/powerpc/power8/
D	other.json	5 …on": "Number of cycles in single lpar mode. All threads in the core are assigned to the same lpar", 389 …The processor's data cache was reloaded from another chip's memory on the same Node or Group (Dist… 390 …The processor's data cache was reloaded from another chip's memory on the same Node or Group (Dist… 401 …a cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either … 402 …a cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either … 407 …ata cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either … 408 …ata cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either … 449 …che was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either … 450 …che was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either … 455 …cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either … [all …]
D	frontend.json	107 …cessor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Dist… 108 …cessor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Dist… 209 … reloaded either shared or modified data from another core's L2/L3 on the same chip due to an inst… 210 … reloaded either shared or modified data from another core's L2/L3 on the same chip due to either … 215 …e was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remo… 216 …e was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remo… 221 …che was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remo… 222 …che was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remo… 227 … processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Rem… 228 … processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Rem… [all …]
D	marked.json	71 …The processor's data cache was reloaded from another chip's memory on the same Node or Group (Dist… 77 …"BriefDescription": "Duration in cycles to reload from another chip's memory on the same Node or G… 263 … reloaded either shared or modified data from another core's L2/L3 on the same chip due to a marke… 269 …to reload either shared or modified data from another core's L2/L3 on the same chip due to a marke… 275 …e was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remo… 281 …cles to reload with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remo… 287 …che was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remo… 293 …cycles to reload with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remo… 299 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same No… 305 …"BriefDescription": "Duration in cycles to reload from another chip's L4 on the same Node or Group… [all …]
/Linux-v5.10/tools/perf/pmu-events/arch/powerpc/power9/
D	translation.json	15 …ata cache was reloaded with Shared (S) data from another core's L2 on the same chip due to a deman… 25 …age Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Dist… 35 …ded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remo… 75 …o the TLB either shared or modified data from another core's L2/L3 on the same chip due to a instr… 80 …ion cache was reloaded with Shared (S) data from another core's L2 on the same chip due to an inst… 95 …a cache was reloaded with Modified (M) data from another core's L2 on the same chip due to a deman… 100 …"A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Rem… 135 …cles to reload with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remo… 200 …n cycles to reload with Shared (S) data from another core's ECO L3 on the same chip due to a marke… 210 …d into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remo… [all …]
D	cache.json	10 …nstruction is not allowed to complete because any of the 4 threads in the same core suffered a flu… 25 …"BriefDescription": "Duration in cycles to reload from another chip's L4 on the same Node or Group… 40 … reloaded either shared or modified data from another core's L2/L3 on the same chip due to an inst… 50 … processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Rem… 55 …che was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remo… 80 …age Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Rem… 100 …e was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remo…
D	pipeline.json	30 … reloaded either shared or modified data from another core's L2/L3 on the same chip due to a marke… 80 … loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a marke… 95 … loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a data … 100 … it lost arbitration onto the issue pipe to another instruction (from the same thread or a differe… 190 …e was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remo… 235 …e was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remo… 250 …ded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remo… 260 …d into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remo… 265 …age Table Entry was loaded into the TLB from another chip's memory on the same Node or Group (Dist… 285 …The processor's data cache was reloaded from another chip's memory on the same Node or Group (Dist… [all …]
D	marked.json	20 …as loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a data … 25 …The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Rem… 70 …oaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a marke… 95 …ded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a marke… 100 …oaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a data … 120 …cessor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Dist… 180 …ata cache was reloaded with Shared (S) data from another core's L3 on the same chip due to a deman… 185 …a cache was reloaded with Modified (M) data from another core's L3 on the same chip due to a deman… 190 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same No… 195 …n cache was reloaded with Modified (M) data from another core's L3 on the same chip due to an inst… [all …]
D	frontend.json	5 … loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a instr… 30 …l 4 slices. This is event is not per thread. All the threads will see the same count for this core… 50 …che was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to a deman… 115 …as loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a instr… 155 …cycles to reload with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remo… 170 …to reload either shared or modified data from another core's L2/L3 on the same chip due to a marke… 195 …age Table Entry was loaded into the TLB from another chip's memory on the same Node or Group ( Rem… 315 …oaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a instr… 330 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same No… 335 …cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to a marke… [all …]
/Linux-v5.10/tools/testing/selftests/arm64/pauth/
D	pac.c	`71 int same = 0; in n_same_single_set() local 84 same += 1; in n_same_single_set() 87 return same; in n_same_single_set() 252 int same = 10; in TEST() local 281 if (tmp < same) in TEST() 282 same = tmp; in TEST() 285 ASSERT_EQ(0, same) TH_LOG("%d keys clashed every time", same); in TEST() 297 int same = 10; in TEST() local 318 if (ret < same) in TEST() 319 same = ret; in TEST() [all …]`
/Linux-v5.10/arch/mips/include/asm/sibyte/
D	bcm1480_scd.h	`25 * Pull in the BCM1250's SCD since lots of stuff is the same. 152 * Same as BCM1250 159 * Same as BCM1250 172 * The watchdogs are almost the same as the 1250, except 205 * The timer registers are the same as the BCM1250 213 * Same as BCM1250 220 * Same as BCM1250 228 * SPC_CFG_SRC[0-3] is the same as the 1250. 281 * Same as BCM1250. 287 * Same as BCM1250. [all …]`
/Linux-v5.10/tools/perf/Documentation/
D	perf-buildid-cache.txt	`38 same directory and are also copied. All 3 files are created with read 40 kcore in the cache (with the same build-id) that has the same modules at 41 the same addresses. Use the -v option to see if a copy of kcore is 45 Remove a cached binary which has same build-id of specified file 62 exactly same build-id, that is replaced by new one. It can be used`
/Linux-v5.10/Documentation/vm/
D	zswap.rst	117 Some of the pages in zswap are same-value filled pages (i.e. contents of the 118 page have same value or repetitive pattern). These pages include zero-filled 120 checked if it is a same-value filled page before compressing it. If true, the 121 compressed length of the page is set to zero and the pattern or same-filled 124 Same-value filled pages identification feature is enabled by default and can be 132 When zswap same-filled page identification is disabled at runtime, it will stop 133 checking for the same-value filled pages during store operation. However, the 134 existing pages which are marked as same-value filled pages remain stored 151 of pages stored, same-value filled pages and various counters for the reasons
/Linux-v5.10/Documentation/devicetree/bindings/net/
D	socionext-netsec.txt	`11 - phy-mode: See ethernet.txt file in the same directory 12 - phy-handle: See ethernet.txt in the same directory. 26 Optional properties: (See ethernet.txt file in the same directory) 29 - max-speed: See ethernet.txt in the same directory. 30 - max-frame-size: See ethernet.txt in the same directory.`
/Linux-v5.10/Documentation/networking/
D	af_xdp.rst	30 UMEM. RX and TX can share the same UMEM so that a packet does not have 165 to the same chunk. If the user application is run in the unaligned 261 This flag enables you to bind multiple sockets to the same UMEM. It 262 works on the same queue id, between queue ids and between 269 sockets bound to the same netdev and queue id. The UMEM (tied to the 315 same UMEM. However, note that you need to supply the 324 to two different queue ids on the same netdev. Create the first socket 330 socket. These two sockets will now share one and the same UMEM. 333 case where sockets were bound to the same queue id and 344 one. Both methods yield the same result. [all …]
/Linux-v5.10/drivers/pci/
D	Kconfig	105 require SR-IOV support, while at the same time the PF (Physical 157 to access more than one IO address space at the same time. To make 176 P2P DMA transactions must be between devices behind the same root 203 at compile-time. The choices are the same as those offered for 215 Use the BIOS defaults; don't touch MPS at all. This is the same 231 is the same as booting with 'pci=pcie_bus_safe'. 240 parent. This is the same as booting with 'pci=pcie_bus_perf'. 251 This is the same as booting with 'pci=pcie_bus_peer2peer'.
/Linux-v5.10/Documentation/core-api/
D	refcount-vs-atomic.rst	35 program order (po) relation (on the same CPU). It guarantees that 42 stores (all po-earlier instructions) on the same CPU are completed 43 before any po-later instruction is executed on the same CPU. 44 It also guarantees that all po-earlier stores on the same CPU 50 stores (all po-earlier instructions) on the same CPU are completed 52 stores on the same CPU and all propagated stores from other CPUs 58 stores (all po-later instructions) on the same CPU are 60 po-later stores on the same CPU must propagate to all other CPUs
/Linux-v5.10/Documentation/x86/
D	sva.rst	11 same virtual addresses avoiding the need for software to translate virtual 18 (PRI) allow devices to function much the same way as the CPU handling 98 with the same PASID. The platform IOMMU uses the PASID in the transaction to 104 thread can interact with a device. Threads that belong to the same 105 process share the same page tables, thus the same MSR value. 113 with multiple devices since they all share the same address space. 132 * Multiple processes can separately mmap() the same portal, in 144 work in the same address space, i.e., to share it. Some call it Shared 179 * Is this the same as a user space device driver? 186 * Is this the same as SR-IOV?
/Linux-v5.10/include/linux/
D	rwsem.h	`26 * other to increase the chance that they will share the same cacheline. 32 * reduce the chance that they will share the same cacheline causing 112 * This is the same regardless of which rwsem implementation that is being used. 162 * (which occurs if the same task tries to acquire the same 164 * same lock class might be taken, if the order of the locks 165 * is always the same. This ordering rule can be expressed`

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