Searched +full:rockchip +full:- +full:emmc +full:- +full:phy (Results 1 – 25 of 47) sorted by relevance
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/Linux-v6.1/Documentation/devicetree/bindings/phy/ |
D | rockchip-emmc-phy.txt | 1 Rockchip EMMC PHY 2 ----------------------- 5 - compatible: rockchip,rk3399-emmc-phy 6 - #phy-cells: must be 0 7 - reg: PHY register address offset and length in "general 11 - clock-names: Should contain "emmcclk". Although this is listed as optional 14 See ../clock/clock-bindings.txt for details. 15 - clocks: Should have a phandle to the card clock exported by the SDHCI driver. 16 - drive-impedance-ohm: Specifies the drive impedance in Ohm. 19 - rockchip,enable-strobe-pulldown: Enable internal pull-down for the strobe [all …]
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/Linux-v6.1/drivers/phy/rockchip/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # Phy drivers for Rockchip platforms 6 tristate "Rockchip Display Port PHY Driver" 10 Enable this to support the Rockchip Display Port PHY. 13 tristate "Rockchip MIPI Synopsys DPHY RX0 driver" 18 Enable this to support the Rockchip MIPI Synopsys DPHY RX0 19 associated to the Rockchip ISP module present in RK3399 SoCs. 22 will be called phy-rockchip-dphy-rx0. 25 tristate "Rockchip EMMC PHY Driver" 29 Enable this to support the Rockchip EMMC PHY. [all …]
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D | phy-rockchip-emmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Rockchip emmc PHY driver 5 * Copyright (C) 2016 Shawn Lin <shawn.lin@rock-chips.com> 6 * Copyright (C) 2016 ROCKCHIP, Inc. 15 #include <linux/phy/phy.h> 20 * The higher 16-bit of this register is used for write protection 93 static int rockchip_emmc_phy_power(struct phy *phy, bool on_off) in rockchip_emmc_phy_power() argument 95 struct rockchip_emmc_phy *rk_phy = phy_get_drvdata(phy); in rockchip_emmc_phy_power() 106 regmap_write(rk_phy->reg_base, in rockchip_emmc_phy_power() 107 rk_phy->reg_offset + GRF_EMMCPHY_CON6, in rockchip_emmc_phy_power() [all …]
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D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_PHY_ROCKCHIP_DP) += phy-rockchip-dp.o 3 obj-$(CONFIG_PHY_ROCKCHIP_DPHY_RX0) += phy-rockchip-dphy-rx0.o 4 obj-$(CONFIG_PHY_ROCKCHIP_EMMC) += phy-rockchip-emmc.o 5 obj-$(CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY) += phy-rockchip-inno-csidphy.o 6 obj-$(CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY) += phy-rockchip-inno-dsidphy.o 7 obj-$(CONFIG_PHY_ROCKCHIP_INNO_HDMI) += phy-rockchip-inno-hdmi.o 8 obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2) += phy-rockchip-inno-usb2.o 9 obj-$(CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY) += phy-rockchip-naneng-combphy.o 10 obj-$(CONFIG_PHY_ROCKCHIP_PCIE) += phy-rockchip-pcie.o [all …]
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/Linux-v6.1/arch/arm/boot/dts/ |
D | rk3288-phycore-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device tree file for Phytec phyCORE-RK3288 SoM 8 #include <dt-bindings/net/ti-dp83867.h> 13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288"; 29 ext_gmac: external-gmac-clock { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <125000000>; 33 clock-output-names = "ext_gmac"; 36 leds: user-leds { [all …]
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D | rk3228-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 8 model = "Rockchip RK3228 Evaluation board"; 9 compatible = "rockchip,rk3228-evb", "rockchip,rk3228"; 12 mmc0 = &emmc; 20 vcc_phy: vcc-phy-regulator { 21 compatible = "regulator-fixed"; 22 enable-active-high; 23 regulator-name = "vcc_phy"; 24 regulator-min-microvolt = <1800000>; [all …]
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D | rk3066a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3066a-cru.h> 10 #include <dt-bindings/power/rk3066-power.h> 14 compatible = "rockchip,rk3066a"; 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; [all …]
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D | rk3288-veyron.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/clock/rockchip,rk808.h> 9 #include <dt-bindings/input/input.h> 14 stdout-path = "serial2:115200n8"; 27 power_button: power-button { 28 compatible = "gpio-keys"; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&pwr_key_l>; 32 key-power { 36 debounce-interval = <100>; [all …]
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D | rk3188.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3188-cru.h> 10 #include <dt-bindings/power/rk3188-power.h> 14 compatible = "rockchip,rk3188"; 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; [all …]
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D | rk3288-rock2-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/pwm/pwm.h> 12 emmc_pwrseq: emmc-pwrseq { 13 compatible = "mmc-pwrseq-emmc"; 14 pinctrl-0 = <&emmc_reset>; 15 pinctrl-names = "default"; 16 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; 19 ext_gmac: external-gmac-clock { 20 compatible = "fixed-clock"; 21 #clock-cells = <0>; [all …]
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D | rk3229-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/input/input.h> 9 model = "Rockchip RK3229 Evaluation board"; 10 compatible = "rockchip,rk3229-evb", "rockchip,rk3229"; 13 mmc0 = &emmc; 21 dc_12v: dc-12v-regulator { 22 compatible = "regulator-fixed"; 23 regulator-name = "dc_12v"; 24 regulator-always-on; [all …]
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D | rk3288.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3288-cru.h> 8 #include <dt-bindings/power/rk3288-power.h> 9 #include <dt-bindings/thermal/thermal.h> 10 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #address-cells = <2>; [all …]
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D | rv1108.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/rv1108-cru.h> 7 #include <dt-bindings/pinctrl/rockchip.h> 8 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 13 compatible = "rockchip,rv1108"; [all …]
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D | rk322x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3228-cru.h> 8 #include <dt-bindings/thermal/thermal.h> 9 #include <dt-bindings/power/rk3228-power.h> 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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D | rk3066a-rayeager.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 12 compatible = "chipspark,rayeager-px2", "rockchip,rk3066a"; 17 mmc2 = &emmc; 25 ir: ir-receiver { 26 compatible = "gpio-ir-receiver"; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&ir_int>; 32 keys: gpio-keys { [all …]
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D | rk3229-xms6.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/input/input.h> 10 compatible = "mecer,xms6", "rockchip,rk3229"; 15 mmc2 = &emmc; 23 dc_12v: dc-12v-regulator { 24 compatible = "regulator-fixed"; 25 regulator-name = "dc_12v"; 26 regulator-always-on; 27 regulator-boot-on; [all …]
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/Linux-v6.1/arch/arm64/boot/dts/rockchip/ |
D | rk3368-evb.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2015 Caesar Wang <wxt@rock-chips.com> 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/pwm/pwm.h> 12 mmc0 = &emmc; 16 stdout-path = "serial2:115200n8"; 25 compatible = "pwm-backlight"; 26 brightness-levels = < 59 default-brightness-level = <128>; 60 enable-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; [all …]
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D | rk3368-r88.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/input/input.h> 11 model = "Rockchip R88"; 12 compatible = "rockchip,r88", "rockchip,rk3368"; 16 mmc1 = &emmc; 20 stdout-path = "serial2:115200n8"; 28 emmc_pwrseq: emmc-pwrseq { 29 compatible = "mmc-pwrseq-emmc"; 30 pinctrl-0 = <&emmc_reset>; [all …]
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D | rk3368-orion-r68-meta.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 11 model = "Rockchip Orion R68"; 12 compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368"; 16 mmc1 = &emmc; 20 stdout-path = "serial2:115200n8"; 28 emmc_pwrseq: emmc-pwrseq { 29 compatible = "mmc-pwrseq-emmc"; 30 pinctrl-0 = <&emmc_reset>; [all …]
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D | rk3328.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 6 #include <dt-bindings/clock/rk3328-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3328-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> [all …]
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D | rk3308-rock-pi-s.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 12 compatible = "radxa,rockpis", "rockchip,rk3308"; 16 mmc0 = &emmc; 21 stdout-path = "serial0:1500000n8"; 25 compatible = "gpio-leds"; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&green_led_gio>, <&heartbeat_led_gpio>; 29 green-led { 30 default-state = "on"; [all …]
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D | rk3328-a1.dts | 1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT) 2 // Copyright (c) 2017-2019 Arm Ltd. 4 /dts-v1/; 9 compatible = "azw,beelink-a1", "rockchip,rk3328"; 13 mmc1 = &emmc; 20 * /------- 21 * L / o <- Gnd 22 * e / o <-- Rx 23 * f / o <--- Tx 24 * t / o <---- +3.3v [all …]
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D | rk3328-rock-pi-e.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * (C) Copyright 2020 Chen-Yu Tsai <wens@csie.org> 5 * Based on ./rk3328-rock64.dts, which is 10 /dts-v1/; 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/leds/common.h> 15 #include <dt-bindings/pinctrl/rockchip.h> 21 compatible = "radxa,rockpi-e", "rockchip,rk3328"; 25 mmc1 = &emmc; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/soc/rockchip/ |
D | grf.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/soc/rockchip/grf.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip General Register Files (GRF) 10 - Heiko Stuebner <heiko@sntech.de> 15 - items: 16 - enum: 17 - rockchip,rk3288-sgrf 18 - rockchip,rk3566-pipe-grf [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/mmc/ |
D | arasan,sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 10 - Adrian Hunter <adrian.hunter@intel.com> 13 - $ref: "mmc-controller.yaml#" 14 - if: 18 const: arasan,sdhci-5.1 21 - phys 22 - phy-names 23 - if: [all …]
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