Searched +full:rk808 +full:- +full:clkout1 (Results 1 – 14 of 14) sorted by relevance
/Linux-v6.1/drivers/clk/ |
D | clk-rk808.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Clkout driver for Rockchip RK808 7 * Author:Chris Zhong <zyw@rock-chips.com> 10 #include <linux/clk-provider.h> 14 #include <linux/mfd/rk808.h> 18 struct rk808 *rk808; member 34 struct rk808 *rk808 = rk808_clkout->rk808; in rk808_clkout2_enable() local 36 return regmap_update_bits(rk808->regmap, RK808_CLK32OUT_REG, in rk808_clkout2_enable() 55 struct rk808 *rk808 = rk808_clkout->rk808; in rk808_clkout2_is_prepared() local 58 int ret = regmap_read(rk808->regmap, RK808_CLK32OUT_REG, &val); in rk808_clkout2_is_prepared() [all …]
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D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 60 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 85 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818" 88 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock. 89 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 90 Clkout1 is always on, Clkout2 can off by control register. 99 multi-function device has one fixed-rate oscillator, clocked 130 be pre-programmed to support other configurations and features not yet 179 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 197 For example, the CDCE925 contains two PLLs with spread-spectrum [all …]
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/Linux-v6.1/arch/arm/boot/dts/ |
D | rk3288-vmarc-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 12 compatible = "vamrs,rk3288-vmarc-som", "rockchip,rk3288"; 14 vccio_flash: vccio-flash-regulator { 15 compatible = "regulator-fixed"; 16 regulator-name = "vccio_flash"; 17 regulator-min-microvolt = <1800000>; 18 regulator-max-microvolt = <1800000>; 19 vin-supply = <&vcc_io>; [all …]
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/Linux-v6.1/arch/arm64/boot/dts/rockchip/ |
D | px30-engicam-px30-core.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 13 compatible = "engicam,px30-core", "rockchip,px30"; 21 cpu-supply = <&vdd_arm>; 25 cpu-supply = <&vdd_arm>; 29 cpu-supply = <&vdd_arm>; 33 cpu-supply = <&vdd_arm>; 37 cap-mmc-highspeed; 38 mmc-hs200-1_8v; [all …]
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D | rk3399-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/pwm/pwm.h> 12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399"; 19 compatible = "pwm-backlight"; 20 brightness-levels = < 53 default-brightness-level = <200>; 57 edp_panel: edp-panel { 58 compatible = "lg,lp079qx1-sp0v"; 60 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; [all …]
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D | rk3399pro-vmarc-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 10 #include <dt-bindings/pwm/pwm.h> 13 compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro"; 20 vcc3v3_pcie: vcc-pcie-regulator { 21 compatible = "regulator-fixed"; 22 enable-active-high; 24 pinctrl-names = "default"; 25 pinctrl-0 = <&pcie_pwr>; [all …]
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D | rk3566-soquartz.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 21 stdout-path = "serial2:1500000n8"; 24 gmac1_clkin: external-gmac1-clock { 25 compatible = "fixed-clock"; 26 clock-frequency = <125000000>; 27 clock-output-names = "gmac1_clkin"; 28 #clock-cells = <0>; [all …]
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D | rk3566-roc-pc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/soc/rockchip,vop2.h> 12 compatible = "firefly,rk3566-roc-pc", "rockchip,rk3566"; 21 stdout-path = "serial2:1500000n8"; 24 gmac1_clkin: external-gmac1-clock { 25 compatible = "fixed-clock"; 26 clock-frequency = <125000000>; [all …]
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D | rk3399-rock-4c-plus.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/leds/common.h> 11 #include "rk3399-t-opp.dtsi" 15 compatible = "radxa,rock-4c-plus", "rockchip,rk3399"; 23 stdout-path = "serial2:1500000n8"; 26 clkin_gmac: external-gmac-clock { 27 compatible = "fixed-clock"; 28 clock-frequency = <125000000>; 29 clock-output-names = "clkin_gmac"; [all …]
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D | rk3566-quartz64-b.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/soc/rockchip,vop2.h> 11 model = "Pine64 RK3566 Quartz64-B Board"; 12 compatible = "pine64,quartz64-b", "rockchip,rk3566"; 22 stdout-path = "serial2:1500000n8"; 25 gmac1_clkin: external-gmac1-clock { 26 compatible = "fixed-clock"; [all …]
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D | rk3566-quartz64-a.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/soc/rockchip,vop2.h> 11 model = "Pine64 RK3566 Quartz64-A Board"; 12 compatible = "pine64,quartz64-a", "rockchip,rk3566"; 21 stdout-path = "serial2:1500000n8"; 24 gmac1_clkin: external-gmac1-clock { 25 compatible = "fixed-clock"; [all …]
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D | rk3566-anbernic-rgxx3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/input/linux-event-codes.h> 7 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/soc/rockchip,vop2.h> 14 stdout-path = "serial2:1500000n8"; 17 adc-joystick { 18 compatible = "adc-joystick"; [all …]
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D | rk3326-odroid-go2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 14 model = "ODROID-GO Advance"; 15 compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326"; 22 stdout-path = "serial2:115200n8"; 25 adc-joystick { 26 compatible = "adc-joystick"; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/mfd/ |
D | rockchip,rk817.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chris Zhong <zyw@rock-chips.com> 11 - Zhang Qing <zhangqing@rock-chips.com> 21 - rockchip,rk817 29 '#clock-cells': 31 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs. 35 clock-output-names: 39 rockchip,system-power-controller: [all …]
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