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/Linux-v6.1/Documentation/devicetree/bindings/riscv/
Dcpus.yaml4 $id: http://devicetree.org/schemas/riscv/cpus.yaml#
42 - const: riscv
48 - const: riscv
49 - const: riscv # Simulator only
59 https://riscv.org/specifications/
62 - riscv,sv32
63 - riscv,sv39
64 - riscv,sv48
65 - riscv,none
67 riscv,cbom-block-size:
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/Linux-v6.1/arch/riscv/
DMakefile51 riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
52 riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
53 riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
54 riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
58 toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zicsr_zifencei)
59 riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei
62 riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZICBOM) := $(riscv-march-y)_zicbom
65 riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) := $(riscv-march-y)_zihintpause
67 KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
68 KBUILD_AFLAGS += -march=$(riscv-march-y)
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/Linux-v6.1/arch/riscv/boot/dts/sifive/
Dfu540-c000.dtsi26 compatible = "sifive,e51", "sifive,rocket0", "riscv";
32 riscv,isa = "rv64imac";
36 compatible = "riscv,cpu-intc";
41 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
53 mmu-type = "riscv,sv39";
55 riscv,isa = "rv64imafdc";
60 compatible = "riscv,cpu-intc";
65 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
77 mmu-type = "riscv,sv39";
79 riscv,isa = "rv64imafdc";
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Dfu740-c000.dtsi26 compatible = "sifive,bullet0", "riscv";
33 riscv,isa = "rv64imac";
37 compatible = "riscv,cpu-intc";
42 compatible = "sifive,bullet0", "riscv";
54 mmu-type = "riscv,sv39";
57 riscv,isa = "rv64imafdc";
61 compatible = "riscv,cpu-intc";
66 compatible = "sifive,bullet0", "riscv";
78 mmu-type = "riscv,sv39";
81 riscv,isa = "rv64imafdc";
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/Linux-v6.1/Documentation/devicetree/bindings/cpu/
Didle-states.yaml265 Documentation/devicetree/bindings/riscv/cpus.yaml
268 http://github.com/riscv/riscv-sbi-doc/riscv-sbi.adoc
306 - riscv,idle-state
317 riscv,sbi-suspend-param:
718 compatible = "riscv";
720 riscv,isa = "rv64imafdc";
721 mmu-type = "riscv,sv48";
727 compatible = "riscv,cpu-intc";
734 compatible = "riscv";
736 riscv,isa = "rv64imafdc";
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/Linux-v6.1/arch/riscv/boot/dts/microchip/
Dmpfs.dtsi18 compatible = "sifive,e51", "sifive,rocket0", "riscv";
24 riscv,isa = "rv64imac";
30 compatible = "riscv,cpu-intc";
36 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
48 mmu-type = "riscv,sv39";
50 riscv,isa = "rv64imafdc";
58 compatible = "riscv,cpu-intc";
64 compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
76 mmu-type = "riscv,sv39";
78 riscv,isa = "rv64imafdc";
[all …]
/Linux-v6.1/drivers/clocksource/
Dtimer-riscv.c11 #define pr_fmt(fmt) "riscv-timer: " fmt
24 #include <clocksource/timer-riscv.h>
143 child = of_get_compatible_child(n, "riscv,cpu-intc"); in riscv_timer_init_dt()
165 pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", in riscv_timer_init_dt()
174 "riscv-timer", &riscv_clock_event); in riscv_timer_init_dt()
181 "clockevents/riscv/timer:starting", in riscv_timer_init_dt()
184 pr_err("cpu hp setup state failed for RISCV timer [%d]\n", in riscv_timer_init_dt()
195 TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);
/Linux-v6.1/tools/testing/kunit/qemu_configs/
Driscv.py11 …'Please ensure that qemu-system-riscv is installed, or edit the path in "qemu_configs/riscv.py"\n')
14 QEMU_ARCH = QemuArchParams(linux_arch='riscv',
23 kernel_path='arch/riscv/boot/Image',
/Linux-v6.1/arch/riscv/boot/dts/starfive/
Djh7100.dtsi21 compatible = "sifive,u74-mc", "riscv";
34 mmu-type = "riscv,sv39";
35 riscv,isa = "rv64imafdc";
39 compatible = "riscv,cpu-intc";
46 compatible = "sifive,u74-mc", "riscv";
59 mmu-type = "riscv,sv39";
60 riscv,isa = "rv64imafdc";
64 compatible = "riscv,cpu-intc";
133 riscv,ndev = <133>;
/Linux-v6.1/Documentation/devicetree/bindings/interrupt-controller/
Dsifive,plic-1.0.0.yaml71 - const: riscv,plic0
91 riscv,cpu-intc node, which has a riscv node as parent.
93 riscv,ndev:
111 - riscv,ndev
169 riscv,ndev = <10>;
Driscv,cpu-intc.txt27 - compatible : "riscv,cpu-intc"
45 compatible = "riscv";
49 compatible = "sifive,fu540-c000-cpu-intc", "riscv,cpu-intc";
/Linux-v6.1/arch/riscv/include/asm/
Dgdb_xml.h13 "qXfer:features:read:riscv-64bit-cpu.xml";
19 "<xi:include href=\"riscv-64bit-cpu.xml\"/>"
25 "<feature name=\"org.gnu.gdb.riscv.cpu\">"
65 "qXfer:features:read:riscv-32bit-cpu.xml";
71 "<xi:include href=\"riscv-32bit-cpu.xml\"/>"
77 "<feature name=\"org.gnu.gdb.riscv.cpu\">"
Dimage.h6 #define RISCV_IMAGE_MAGIC "RISCV\0\0\0"
34 * struct riscv_image_header - riscv kernel image header
/Linux-v6.1/drivers/clk/sunxi-ng/
DKconfig17 default RISCV && ARCH_SUNXI
18 depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST
22 default RISCV && ARCH_SUNXI
23 depends on (RISCV && ARCH_SUNXI) || COMPILE_TEST
/Linux-v6.1/arch/riscv/kernel/
Dcpu.c24 if (!of_device_is_compatible(node, "riscv")) { in riscv_of_processor_hartid()
40 if (of_property_read_string(node, "riscv,isa", &isa)) { in riscv_of_processor_hartid()
41 pr_warn("CPU with hartid=%lu has no \"riscv,isa\" property\n", *hart); in riscv_of_processor_hartid()
63 if (of_device_is_compatible(node, "riscv")) { in riscv_of_parent_hartid()
107 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "riscv/cpuinfo:starting", in riscv_cpuinfo_init()
244 if (!of_property_read_string(node, "riscv,isa", &isa)) in c_show()
248 && strcmp(compat, "riscv")) in c_show()
Dcpufeature.c100 if (of_property_read_string(node, "riscv,isa", &isa)) { in riscv_fill_hwcap()
101 pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); in riscv_fill_hwcap()
113 /* The riscv,isa DT property must start with rv64 or rv32 */ in riscv_fill_hwcap()
239 pr_info("riscv: base ISA extensions %s\n", print_str); in riscv_fill_hwcap()
245 pr_info("riscv: ELF capabilities %s\n", print_str); in riscv_fill_hwcap()
/Linux-v6.1/drivers/irqchip/
Dirq-riscv-intc.c8 #define pr_fmt(fmt) "riscv-intc: " fmt
130 "irqchip/riscv/intc:starting", in riscv_intc_init()
139 IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init);
/Linux-v6.1/drivers/firmware/efi/
DMakefile43 riscv-obj-$(CONFIG_EFI) := efi-init.o riscv-runtime.o
44 obj-$(CONFIG_RISCV) += $(riscv-obj-y)
/Linux-v6.1/arch/riscv/boot/dts/canaan/
Dk210.dtsi38 compatible = "canaan,k210", "riscv";
40 riscv,isa = "rv64imafdc";
41 mmu-type = "riscv,none";
49 compatible = "riscv,cpu-intc";
54 compatible = "canaan,k210", "riscv";
56 riscv,isa = "rv64imafdc";
57 mmu-type = "riscv,none";
65 compatible = "riscv,cpu-intc";
132 riscv,ndev = <65>;
/Linux-v6.1/Documentation/translations/zh_CN/riscv/
Dpatch-acceptance.rst5 :Original: Documentation/riscv/patch-acceptance.rst
13 arch/riscv 开发者维护指南
/Linux-v6.1/scripts/
Dsubarch.include13 -e s/riscv.*/riscv/ -e s/loongarch.*/loongarch/)
/Linux-v6.1/tools/testing/selftests/kvm/
DMakefile36 # Set UNAME_M riscv compile/install to work
37 ifeq ($(ARCH),riscv)
38 UNAME_M := riscv
73 LIBKVM_riscv += lib/riscv/processor.c
74 LIBKVM_riscv += lib/riscv/ucall.c
/Linux-v6.1/tools/scripts/
DMakefile.arch8 -e s/riscv.*/riscv/)
/Linux-v6.1/drivers/cpuidle/
DKconfig70 depends on RISCV
71 source "drivers/cpuidle/Kconfig.riscv"
/Linux-v6.1/include/linux/perf/
Driscv_pmu.h24 #define RISCV_PMU_PDEV_NAME "riscv-pmu"
25 #define RISCV_PMU_LEGACY_PDEV_NAME "riscv-pmu-legacy"

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