| /Linux-v5.10/drivers/net/wireless/intel/iwlwifi/fw/api/ |
| D | scan.h | 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 * Copyright(c) 2018 - 2019 Intel Corporation
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34 * Copyright(c) 2018 - 2019 Intel Corporation
35 * All rights reserved.
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| D | nvm-reg.h | 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 * Copyright(C) 2018 - 2020 Intel Corporation
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34 * Copyright(C) 2018 - 2020 Intel Corporation
35 * All rights reserved.
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| /Linux-v5.10/Documentation/devicetree/bindings/dma/ |
| D | ingenic,dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: "dma-controller.yaml#"
18 - ingenic,jz4740-dma
19 - ingenic,jz4725b-dma
20 - ingenic,jz4770-dma
21 - ingenic,jz4780-dma
22 - ingenic,x1000-dma
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| D | ti-edma.txt | 8 ------------------------------------------------------------------------------
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
20 - reg: Memory map of eDMA CC
21 - reg-names: "edma3_cc"
22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
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| D | dma-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/dma-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
20 "#dma-cells":
27 dma-channel-mask:
29 Bitmask of available DMA channels in ascending order that are
30 not reserved by firmware and are available to the
32 The first item in the array is for channels 0-31, the second is for
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| D | fsl-mxs-dma.txt | 4 - compatible : Should be "fsl,<chip>-dma-apbh" or "fsl,<chip>-dma-apbx"
5 - reg : Should contain registers location and length
6 - interrupts : Should contain the interrupt numbers of DMA channels.
7 If a channel is empty/reserved, 0 should be filled in place.
8 - #dma-cells : Must be <1>. The number cell specifies the channel ID.
9 - dma-channels : Number of channels supported by the DMA controller
12 - interrupt-names : Name of DMA channel interrupts
19 dma_apbh: dma-apbh@80004000 {
20 compatible = "fsl,imx28-dma-apbh";
26 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
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| /Linux-v5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | cosmic,10001-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cosmic Circuits CC-10001 ADC
10 - Jonathan Cameron <jic23@kernel.org>
13 Cosmic Circuits 10001 10-bit ADC device.
17 const: cosmic,10001-adc
22 adc-reserved-channels:
25 Bitmask of reserved channels, i.e. channels that cannot be
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| /Linux-v5.10/drivers/interconnect/qcom/ |
| D | icc-rpmh.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
9 #include <dt-bindings/interconnect/qcom,icc.h>
15 * struct qcom_icc_provider - Qualcomm specific interconnect provider
31 * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager (BCM)
35 * @reserved: reserved field
41 u8 reserved; member
50 * struct qcom_icc_node - Qualcomm specific interconnect nodes
55 * @channels: num of channels at this node
67 u16 channels; member
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| /Linux-v5.10/drivers/staging/comedi/drivers/ |
| D | amplc_dio200.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
9 * COMEDI - Linux Control and Measurement Device Interface
24 * [0] - I/O port base address
25 * [1] - IRQ (optional, but commands won't work without it)
32 * ------------- ------------- -------------
34 * 0 PPI-X PPI-X PPI-X
35 * 1 CTR-Y1 PPI-Y PPI-Y
36 * 2 CTR-Y2 CTR-Z1* CTR-Z1
37 * 3 CTR-Z1 INTERRUPT* CTR-Z2
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| D | amplc_dio200_pci.c | 1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
8 * COMEDI - Linux Control and Measurement Device Interface
30 * ------------- ------------- -------------
32 * 0 PPI-X PPI-X PPI-X
33 * 1 PPI-Y UNUSED UNUSED
34 * 2 CTR-Z1 PPI-Y UNUSED
35 * 3 CTR-Z2 UNUSED UNUSED
36 * 4 INTERRUPT CTR-Z1 CTR-Z1
37 * 5 CTR-Z2 CTR-Z2
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| /Linux-v5.10/Documentation/userspace-api/media/v4l/ |
| D | vidioc-g-modulator.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_MODULATOR - VIDIOC_S_MODULATOR - Get or set modulator attributes
39 ``index`` field and zero out the ``reserved`` array of a struct
49 initialize the ``index`` and ``txsubchans`` fields and the ``reserved``
52 this is a write-only ioctl, it does not return the actual audio
67 .. flat-table:: struct v4l2_modulator
68 :header-rows: 0
69 :stub-columns: 0
72 * - __u32
73 - ``index``
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| /Linux-v5.10/Documentation/driver-api/rapidio/ |
| D | tsi721.rst | 2 RapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge.
10 doorbells, inbound maintenance port-writes and RapidIO messaging.
13 channels. This mechanism provides access to larger range of hop counts and
16 RapidIO messaging support uses dedicated messaging channels for each mailbox.
23 - 'dbg_level'
24 - This parameter allows to control amount of debug information
32 - 'dma_desc_per_channel'
33 - This parameter defines number of hardware buffer
37 - 'dma_txqueue_sz'
38 - DMA transactions queue size. Defines number of pending
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| /Linux-v5.10/drivers/edac/ |
| D | i3000_edac.c | 25 /* Intel 3000 register addresses - device 0 function 0 - DRAM Controller */
33 * 7:1 reserved
39 * 6:1 reserved
54 deap |= (edeap & 1) << (32 - PAGE_SHIFT); in deap_pfn()
60 return deap & ~(I3000_DEAP_GRAIN - 1) & ~PAGE_MASK; in deap_offset()
75 * 15:12 reserved
78 * 10 reserved
79 * 9 LOCK to non-DRAM Memory Flag (LCKF)
81 * 7:2 reserved
82 * 1 Multi-bit DRAM ECC Error Flag (DMERR)
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| D | i82975x_edac.c | 34 /* Intel 82975X register addresses - device 0 function 0 - DRAM Controller */
37 * 31:7 128 byte cache-line address
38 * 6:1 reserved
49 * 1h:7h reserved
50 * More - See Page 65 of Intel DocSheet.
55 * 15:12 reserved
57 * 10 reserved
58 * 9 non-DRAM lock error (ndlock)
60 * 7:2 reserved
73 * 15:12 reserved
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| /Linux-v5.10/sound/soc/amd/ |
| D | acp.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
72 /* Playback DMA channels */
76 /* Capture DMA channels */
80 /* Playback DMA Channels for I2S BT instance */
84 /* Capture DMA Channels for I2S BT Instance */
203 /* Reserved for future use */
204 u32 reserved; member
|
| /Linux-v5.10/include/xen/interface/io/ |
| D | sndif.h | 4 * Unified sound-device I/O interface for Xen guest OSes.
24 * Copyright (C) 2013-2015 GlobalLogic Inc.
25 * Copyright (C) 2016-2017 EPAM Systems Inc.
51 * Front->back notifications: when enqueuing a new request, sending a
53 * hold-off mechanism provided by the ring macros). Backends must set
56 * Back->front notifications: when enqueuing a new response, sending a
58 * hold-off mechanism provided by the ring macros). Frontends must set
61 * The two halves of a para-virtual sound card driver utilize nodes within
75 * Note: depending on the use-case backend can expose more sound cards and
77 * SW mixers, configuring virtual sound streams, channels etc.
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| /Linux-v5.10/include/sound/sof/ |
| D | channel_map.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
6 * Copyright(c) 2019 Intel Corporation. All rights reserved.
16 * \brief Channel map, specifies transformation of one-to-many or many-to-one.
18 * In case of one-to-many specifies how the output channels are computed out of
20 * in case of many-to-one specifies how a single target channel is computed
29 * Channel mask describes which channels are taken into account on the "many"
30 * side. Bit[i] set to 1 means that i-th channel is used for computation
41 uint32_t reserved; member
57 uint32_t reserved[3]; member
|
| D | dai-intel.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
6 * Copyright(c) 2018 Intel Corporation. All rights reserved.
52 /* DMIC max. four controllers for eight microphone channels */
55 /* SSP Configuration Request - SOF_IPC_DAI_SSP_CONFIG */
87 /* HDA Configuration Request - SOF_IPC_DAI_HDA_CONFIG */
92 uint32_t channels; member
95 /* ALH Configuration Request - SOF_IPC_DAI_ALH_CONFIG */
100 uint32_t channels; member
102 /* reserved for future use */
103 uint32_t reserved[13]; member
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| /Linux-v5.10/Documentation/devicetree/bindings/crypto/ |
| D | fsl-sec2.txt | 1 Freescale SoC SEC Security Engines versions 1.x-2.x-3.x
5 - compatible : Should contain entries for this and backward compatible
9 - reg : Offset and length of the register set for the device
10 - interrupts : the SEC's interrupt number
11 - fsl,num-channels : An integer representing the number of channels
13 - fsl,channel-fifo-len : An integer representing the number of
15 - fsl,exec-units-mask : The bitmask representing what execution units
16 (EUs) are available. It's a single 32-bit cell. EU information
20 bit 0 = reserved - should be 0
23 bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
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| /Linux-v5.10/Documentation/devicetree/bindings/dsp/ |
| D | fsl,dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Baluta <daniel.baluta@nxp.com>
14 advanced pre- and post- audio processing.
19 - fsl,imx8qxp-dsp
20 - fsl,imx8qm-dsp
21 - fsl,imx8mp-dsp
28 - description: ipg clock
29 - description: ocram clock
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| /Linux-v5.10/include/linux/ |
| D | hyperv.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
27 #include <asm/hyperv-tlfs.h>
48 * gva: |-- 64k --|-- 64k --| ... |
59 * gva: |-- 64k --|-- 64k --| ... |-- 64k --|-- 64k --| ... |
69 * index: 0 1 2 ... 16 ... n-15 n-14 n-13 ... 2n-30
76 /* Single-page buffer */
83 /* Multiple-page buffer */
92 * Multiple-page buffer array; the pfn array is variable size:
123 * WS2012/Win8 and later versions of Hyper-V implement interrupt
125 * is set by the host on the host->guest ring buffer, and by the
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| /Linux-v5.10/Documentation/hwmon/ |
| D | twl4030-madc-hwmon.rst | 1 Kernel driver twl4030-madc
8 Prefix: 'twl4030-madc'
12 J Keerthy <j-keerthy@ti.com>
15 -----------
18 other things it contains a 10-bit A/D converter MADC. The converter has 16
19 channels which can be used in different modes.
22 See this table for the meaning of the different channels
40 13 Reserved
41 14 Reserved
|
| /Linux-v5.10/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/ |
| D | pool.c | 1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2019-2020, Mellanox Technologies inc. All rights reserved. */
12 struct device *dev = mlx5_core_dma_dev(priv->mdev); in mlx5e_xsk_map_pool()
25 if (!xsk->pools) { in mlx5e_xsk_get_pools()
26 xsk->pools = kcalloc(MLX5E_MAX_NUM_CHANNELS, in mlx5e_xsk_get_pools()
27 sizeof(*xsk->pools), GFP_KERNEL); in mlx5e_xsk_get_pools()
28 if (unlikely(!xsk->pools)) in mlx5e_xsk_get_pools()
29 return -ENOMEM; in mlx5e_xsk_get_pools()
32 xsk->refcnt++; in mlx5e_xsk_get_pools()
33 xsk->ever_used = true; in mlx5e_xsk_get_pools()
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| /Linux-v5.10/drivers/net/wireless/ti/wl18xx/ |
| D | scan.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2012 Texas Instruments. All rights reserved.
58 u8 passive[SCAN_MAX_BANDS]; /* number of passive scan channels */
59 u8 active[SCAN_MAX_BANDS]; /* number of active scan channels */
60 u8 dfs; /* number of dfs channels in 5ghz */
61 u8 passive_active; /* number of passive before active channels 2.4ghz */
66 u8 total_cycles; /* 0 - infinite */
|
| /Linux-v5.10/include/linux/platform_data/ |
| D | dma-ste-dma40.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) ST-Ericsson SA 2007-2010
4 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
5 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
20 * Size is in the units of addr-widths (1,2,4,8 bytes)
26 #define STEDMA40_DEV_DST_MEMORY (-1)
27 #define STEDMA40_DEV_SRC_MEMORY (-1)
49 /* The value 4 indicates that PEN-reg shall be set to 0 */
65 /* Maximum number of possible physical channels */
74 * struct stedma40_half_channel_info - dst/src channel configuration
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