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/Linux-v6.1/tools/perf/pmu-events/arch/x86/bonnell/
Dcache.json67 "BriefDescription": "All data requests from the L1 data cache",
75 "BriefDescription": "All data requests from the L1 data cache",
83 "BriefDescription": "All data requests from the L1 data cache",
91 "BriefDescription": "All data requests from the L1 data cache",
99 "BriefDescription": "All data requests from the L1 data cache",
123 "BriefDescription": "L2 cacheable instruction fetch requests",
131 "BriefDescription": "L2 cacheable instruction fetch requests",
139 "BriefDescription": "L2 cacheable instruction fetch requests",
147 "BriefDescription": "L2 cacheable instruction fetch requests",
155 "BriefDescription": "L2 cacheable instruction fetch requests",
[all …]
/Linux-v6.1/Documentation/block/
Dstat.rst29 read I/Os requests number of read I/Os processed
30 read merges requests number of read I/Os merged with in-queue I/O
32 read ticks milliseconds total wait time for read requests
33 write I/Os requests number of write I/Os processed
34 write merges requests number of write I/Os merged with in-queue I/O
36 write ticks milliseconds total wait time for write requests
37 in_flight requests number of I/Os currently in flight
39 time_in_queue milliseconds total wait time for all requests
40 discard I/Os requests number of discard I/Os processed
41 discard merges requests number of discard I/Os merged with in-queue I/O
[all …]
Dblk-mq.rst9 through queueing and submitting IO requests to block devices simultaneously,
23 involves ordering read/write requests according to the current position of the
32 The former design had a single queue to store block IO requests with a single
45 for instance), blk-mq takes action: it will store and manage IO requests to
53 layer or if we want to try to merge requests. In both cases, requests will be
56 Then, after the requests are processed by software queues, they will be placed
58 to process those requests. However, if the hardware does not have enough
59 resources to accept more requests, blk-mq will places requests on a temporary
65 The block IO subsystem adds requests in the software staging queues
73 The staging queue can be used to merge requests for adjacent sectors. For
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/sandybridge/
Duncore-other.json3 "BriefDescription": "Cycles weighted by number of requests pending in Coherency Tracker.",
7 "PublicDescription": "Cycles weighted by number of requests pending in Coherency Tracker.",
12 "BriefDescription": "Number of requests allocated in Coherency Tracker.",
17 "PublicDescription": "Number of requests allocated in Coherency Tracker.",
22 …ted by the number of requests waiting for data returning from the memory controller. Accounts for …
26 …ted by the number of requests waiting for data returning from the memory controller. Accounts for …
31 …east half of the requests outstanding are waiting for data return from memory controller. Account …
37 …east half of the requests outstanding are waiting for data return from memory controller. Account …
42 …ta return from memory controller. Account for coherent and non-coherent requests initiated by IA C…
48 …ta return from memory controller. Account for coherent and non-coherent requests initiated by IA C…
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/ivybridge/
Duncore-other.json3 "BriefDescription": "Cycles weighted by number of requests pending in Coherency Tracker.",
7 "PublicDescription": "Cycles weighted by number of requests pending in Coherency Tracker.",
12 "BriefDescription": "Number of requests allocated in Coherency Tracker.",
17 "PublicDescription": "Number of requests allocated in Coherency Tracker.",
22 …ted by the number of requests waiting for data returning from the memory controller. Accounts for …
26 …ted by the number of requests waiting for data returning from the memory controller. Accounts for …
31 …east half of the requests outstanding are waiting for data return from memory controller. Account …
37 …east half of the requests outstanding are waiting for data return from memory controller. Account …
42 …ta return from memory controller. Account for coherent and non-coherent requests initiated by IA C…
48 …ta return from memory controller. Account for coherent and non-coherent requests initiated by IA C…
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
Dpipeline.json75 …"PublicDescription": "This event counts requests in L1D cache pipeline#0 that its sce bit of tagge…
78 …"BriefDescription": "This event counts requests in L1D cache pipeline#0 that its sce bit of tagged…
81 …"PublicDescription": "This event counts requests in L1D cache pipeline#0 that its pfe bit of tagge…
84 …"BriefDescription": "This event counts requests in L1D cache pipeline#0 that its pfe bit of tagged…
87 …"PublicDescription": "This event counts requests in L1D cache pipeline#1 that its sce bit of tagge…
90 …"BriefDescription": "This event counts requests in L1D cache pipeline#1 that its sce bit of tagged…
93 …"PublicDescription": "This event counts requests in L1D cache pipeline#1 that its pfe bit of tagge…
96 …"BriefDescription": "This event counts requests in L1D cache pipeline#1 that its pfe bit of tagged…
99 "PublicDescription": "This event counts completed requests in L1D cache pipeline#0.",
102 "BriefDescription": "This event counts completed requests in L1D cache pipeline#0."
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/amdzen1/
Dcache.json70 "BriefDescription": "The number of ITLB reload requests."
75 …"BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache reads (including har…
81 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache stores.",
87 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache shared reads.",
93 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Instruction cache reads.",
99 …"BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache state change request…
105 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). PrefetchL2Cmd.",
111 …"BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). L2 Prefetcher. All prefetches a…
134 "BriefDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized.",
140 …"BriefDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized non-cacheab…
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/amdzen3/
Dcache.json5 …"BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache reads (including har…
11 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache stores.",
17 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache shared reads.",
23 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Instruction cache reads.",
29 …"BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache state change request…
35 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). PrefetchL2Cmd.",
41 …"BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). L2 Prefetcher. All prefetches a…
64 "BriefDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized.",
70 …"BriefDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized non-cacheab…
76 "BriefDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Instruction cache read sized.",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/nehalemex/
Dmemory.json91 "BriefDescription": "Offcore requests satisfied by any DRAM",
102 "BriefDescription": "Offcore requests that missed the LLC",
113 "BriefDescription": "Offcore requests satisfied by the local DRAM",
124 "BriefDescription": "Offcore requests satisfied by a remote DRAM",
135 "BriefDescription": "Offcore RFO requests satisfied by any DRAM",
146 "BriefDescription": "Offcore RFO requests that missed the LLC",
157 "BriefDescription": "Offcore RFO requests satisfied by the local DRAM",
168 "BriefDescription": "Offcore RFO requests satisfied by a remote DRAM",
223 "BriefDescription": "Offcore code or data read requests satisfied by any DRAM",
234 "BriefDescription": "Offcore code or data read requests that missed the LLC",
[all …]
Dcache.json187 "BriefDescription": "L1D hardware prefetch requests",
190 "EventName": "L1D_PREFETCH.REQUESTS",
195 "BriefDescription": "L1D hardware prefetch requests triggered",
243 "BriefDescription": "All L2 data requests",
267 "BriefDescription": "L2 data demand requests",
435 "BriefDescription": "L2 requests",
475 "BriefDescription": "All L2 requests",
483 "BriefDescription": "L2 RFO requests",
920 "BriefDescription": "Offcore requests blocked due to Super Queue full",
1192 "BriefDescription": "Offcore requests satisfied by any cache or DRAM",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/westmereex/
Dmemory.json99 "BriefDescription": "Offcore requests satisfied by any DRAM",
110 "BriefDescription": "Offcore requests that missed the LLC",
121 "BriefDescription": "Offcore requests satisfied by the local DRAM",
132 "BriefDescription": "Offcore requests satisfied by a remote DRAM",
143 "BriefDescription": "Offcore RFO requests satisfied by any DRAM",
154 "BriefDescription": "Offcore RFO requests that missed the LLC",
165 "BriefDescription": "Offcore RFO requests satisfied by the local DRAM",
176 "BriefDescription": "Offcore RFO requests satisfied by a remote DRAM",
231 "BriefDescription": "Offcore code or data read requests satisfied by any DRAM",
242 "BriefDescription": "Offcore code or data read requests that missed the LLC",
[all …]
Dcache.json67 "BriefDescription": "L1D hardware prefetch requests",
70 "EventName": "L1D_PREFETCH.REQUESTS",
75 "BriefDescription": "L1D hardware prefetch requests triggered",
123 "BriefDescription": "All L2 data requests",
147 "BriefDescription": "L2 data demand requests",
315 "BriefDescription": "L2 requests",
355 "BriefDescription": "All L2 requests",
363 "BriefDescription": "L2 RFO requests",
837 "BriefDescription": "All offcore requests",
845 "BriefDescription": "Offcore read requests",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/nehalemep/
Dmemory.json91 "BriefDescription": "Offcore requests satisfied by any DRAM",
102 "BriefDescription": "Offcore requests that missed the LLC",
113 "BriefDescription": "Offcore requests satisfied by the local DRAM",
124 "BriefDescription": "Offcore requests satisfied by a remote DRAM",
135 "BriefDescription": "Offcore RFO requests satisfied by any DRAM",
146 "BriefDescription": "Offcore RFO requests that missed the LLC",
157 "BriefDescription": "Offcore RFO requests satisfied by the local DRAM",
168 "BriefDescription": "Offcore RFO requests satisfied by a remote DRAM",
223 "BriefDescription": "Offcore code or data read requests satisfied by any DRAM",
234 "BriefDescription": "Offcore code or data read requests that missed the LLC",
[all …]
Dcache.json187 "BriefDescription": "L1D hardware prefetch requests",
190 "EventName": "L1D_PREFETCH.REQUESTS",
195 "BriefDescription": "L1D hardware prefetch requests triggered",
243 "BriefDescription": "All L2 data requests",
267 "BriefDescription": "L2 data demand requests",
435 "BriefDescription": "L2 requests",
475 "BriefDescription": "All L2 requests",
483 "BriefDescription": "L2 RFO requests",
965 "BriefDescription": "Offcore requests blocked due to Super Queue full",
1237 "BriefDescription": "Offcore requests satisfied by any cache or DRAM",
[all …]
/Linux-v6.1/Documentation/virt/kvm/
Dvcpu-requests.rst4 KVM VCPU Requests
14 /* Check if any requests are pending for VCPU @vcpu. */
40 as possible after making the request. This means most requests
69 ensure VCPU requests are seen by VCPUs (see "Ensuring Requests Are Seen"),
90 certain VCPU requests, namely KVM_REQ_TLB_FLUSH, to wait until the VCPU
96 VCPU requests are simply bit indices of the ``vcpu->requests`` bitmap.
100 clear_bit(KVM_REQ_UNBLOCK & KVM_REQUEST_MASK, &vcpu->requests);
104 independent requests, all additional bits are available for architecture
105 dependent requests.
107 Architecture Independent Requests
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/amdzen2/
Dcache.json5 …"BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache reads (including har…
11 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache stores.",
17 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache shared reads.",
23 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Instruction cache reads.",
29 …"BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). Data cache state change request…
35 "BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). PrefetchL2Cmd.",
41 …"BriefDescription": "All L2 Cache Requests (Breakdown 1 - Common). L2 Prefetcher. All prefetches a…
64 "BriefDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized.",
70 …"BriefDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Data cache read sized non-cacheab…
76 "BriefDescription": "All L2 Cache Requests (Breakdown 2 - Rare). Instruction cache read sized.",
[all …]
/Linux-v6.1/drivers/gpu/drm/i915/
Di915_scheduler_types.h25 * Requests from a context with a greater (more positive) value of
39 * Requests exist in a complex web of interdependencies. Each request
45 * at various points to reorder the requests whilst keeping the requests
112 * @lock: protects requests in priority lists, requests, hold and
118 * @requests: list of requests inflight on this schedule engine
120 struct list_head requests; member
123 * @hold: list of ready requests, but on hold
140 * When we add requests into the queue, or adjust the priority of
141 * executing requests, we compute the maximum priority of those
142 * pending requests. We can then use this value to determine if
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/icelakex/
Dcache.json21 …d request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable…
35 …d request has waited due to L1D Fill Buffer (FB) unavailability. Demand requests include cacheable…
47 …emand request has waited due to L1D due to lack of L2 resources. Demand requests include cacheable…
114 "BriefDescription": "L2 code requests",
120 "PublicDescription": "Counts the total number of L2 code requests.",
126 "BriefDescription": "Demand Data Read requests",
132 …"PublicDescription": "Counts the number of demand Data Read requests (including requests from L1D …
138 "BriefDescription": "Demand requests that miss L2 cache",
144 "PublicDescription": "Counts demand requests that miss L2 cache.",
150 "BriefDescription": "RFO requests to L2 cache",
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/westmereep-sp/
Dmemory.json91 "BriefDescription": "Offcore requests satisfied by any DRAM",
102 "BriefDescription": "Offcore requests that missed the LLC",
113 "BriefDescription": "Offcore requests satisfied by the local DRAM",
124 "BriefDescription": "Offcore requests satisfied by a remote DRAM",
135 "BriefDescription": "Offcore RFO requests satisfied by any DRAM",
146 "BriefDescription": "Offcore RFO requests that missed the LLC",
157 "BriefDescription": "Offcore RFO requests satisfied by the local DRAM",
168 "BriefDescription": "Offcore RFO requests satisfied by a remote DRAM",
223 "BriefDescription": "Offcore code or data read requests satisfied by any DRAM",
234 "BriefDescription": "Offcore code or data read requests that missed the LLC",
[all …]
Dcache.json67 "BriefDescription": "L1D hardware prefetch requests",
70 "EventName": "L1D_PREFETCH.REQUESTS",
75 "BriefDescription": "L1D hardware prefetch requests triggered",
123 "BriefDescription": "All L2 data requests",
147 "BriefDescription": "L2 data demand requests",
315 "BriefDescription": "L2 requests",
355 "BriefDescription": "All L2 requests",
363 "BriefDescription": "L2 RFO requests",
837 "BriefDescription": "All offcore requests",
845 "BriefDescription": "Offcore read requests",
[all …]
/Linux-v6.1/drivers/net/ethernet/intel/ixgbe/
Dixgbe_mbx.h36 clear to send requests */
58 /* mailbox API, legacy requests */
59 #define IXGBE_VF_RESET 0x01 /* VF requests reset */
60 #define IXGBE_VF_SET_MAC_ADDR 0x02 /* VF requests PF to set MAC addr */
61 #define IXGBE_VF_SET_MULTICAST 0x03 /* VF requests PF to set MC addr */
62 #define IXGBE_VF_SET_VLAN 0x04 /* VF requests PF to set VLAN */
64 /* mailbox API, version 1.0 VF requests */
65 #define IXGBE_VF_SET_LPE 0x05 /* VF requests PF to set VMOLR.LPE */
66 #define IXGBE_VF_SET_MACVLAN 0x06 /* VF requests PF for unicast filter */
69 /* mailbox API, version 1.1 VF requests */
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/goldmont/
Dcache.json3 "BriefDescription": "Requests rejected by the L2Q",
8 …etcher requests rejected by the L2Q due to a full or nearly full condition which likely indicates …
32 "BriefDescription": "Requests rejected by the XQ",
37 …IDI) fabric. The XQ may reject transactions from the L2Q (non-cacheable requests), L2 misses and L…
46 …"PublicDescription": "Counts memory requests originating from the core that miss in the L2 cache.",
51 "BriefDescription": "L2 cache requests",
56 …"PublicDescription": "Counts memory requests originating from the core that reference a cache line…
140 …ill buffer) and begins the process of requesting the data. When load Y requests the data, it will…
368 …"BriefDescription": "Counts data read, code read, and read for ownership (RFO) requests (demand & …
376 …"PublicDescription": "Counts data read, code read, and read for ownership (RFO) requests (demand &…
[all …]
/Linux-v6.1/drivers/net/ethernet/intel/ixgbevf/
Dmbx.h50 * clear to send requests
73 /* mailbox API, legacy requests */
74 #define IXGBE_VF_RESET 0x01 /* VF requests reset */
75 #define IXGBE_VF_SET_MAC_ADDR 0x02 /* VF requests PF to set MAC addr */
76 #define IXGBE_VF_SET_MULTICAST 0x03 /* VF requests PF to set MC addr */
77 #define IXGBE_VF_SET_VLAN 0x04 /* VF requests PF to set VLAN */
79 /* mailbox API, version 1.0 VF requests */
80 #define IXGBE_VF_SET_LPE 0x05 /* VF requests PF to set VMOLR.LPE */
81 #define IXGBE_VF_SET_MACVLAN 0x06 /* VF requests PF for unicast filter */
84 /* mailbox API, version 1.1 VF requests */
[all …]
/Linux-v6.1/tools/perf/pmu-events/arch/x86/goldmontplus/
Dcache.json3 "BriefDescription": "Requests rejected by the L2Q",
10 …etcher requests rejected by the L2Q due to a full or nearly full condition which likely indicates …
38 "BriefDescription": "Requests rejected by the XQ",
45 …IDI) fabric. The XQ may reject transactions from the L2Q (non-cacheable requests), L2 misses and L…
56 …"PublicDescription": "Counts memory requests originating from the core that miss in the L2 cache.",
61 "BriefDescription": "L2 cache requests",
68 …"PublicDescription": "Counts memory requests originating from the core that reference a cache line…
159 …ill buffer) and begins the process of requesting the data. When load Y requests the data, it will…
416 …"BriefDescription": "Counts data read, code read, and read for ownership (RFO) requests (demand & …
426 …"PublicDescription": "Counts data read, code read, and read for ownership (RFO) requests (demand &…
[all …]
/Linux-v6.1/drivers/net/ethernet/intel/igb/
De1000_mbx.h30 /* Indicates that VF is still clear to send requests */
36 #define E1000_VF_RESET 0x01 /* VF requests reset */
37 #define E1000_VF_SET_MAC_ADDR 0x02 /* VF requests to set MAC addr */
38 /* VF requests to clear all unicast MAC filters */
40 /* VF requests to add unicast MAC filter */
42 #define E1000_VF_SET_MULTICAST 0x03 /* VF requests to set MC addr */
43 #define E1000_VF_SET_VLAN 0x04 /* VF requests to set VLAN */
44 #define E1000_VF_SET_LPE 0x05 /* VF requests to set VMOLR.LPE */
45 #define E1000_VF_SET_PROMISC 0x06 /*VF requests to clear VMOLR.ROPE/MPME*/

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